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參數資料
| 型號： | 9214YGLF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9214 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, LEAD FREE, MO-153, TSSOP-28 |
| 文件頁數： | 4/16頁 |
| 文件大小： | 224K |
| 代理商： | 9214YGLF-T |
12
Integrated
Circuit
Systems, Inc.
ICS9214
0809G—08/02/08
Figure 2. Example System Clock Driver Equivalent Circuit
Figure 3. Input and Output Voltage Waveforms
Figure 4. Crossing-point Voltage
Input Clock Signal
The ICS9214 receives either a differential or single-ended reference clock (CLK_INT/C). When the reference input clock is
from a differential clock source, it must meet the voltage levels and timing requirements listed in the DC Characteristics –
Inputs and AC Characteristics – Inputs tables.
For a singled-ended clock input, an external voltage divider and a supply voltage, as shown in Figure 2, provide a reference
voltage VTH at the CLK_INC pin to determine the proper switching point for CLK_INT. The range of VTH is specified in the DC
Characteristics – Inputs table.
R2
R3
RT
ZCH
R1
Measurement
Differential Driver
Point
RT
ZCH
Measurement
Point
R2
R3
R1
Swing Current
Control
RRC
VT
VTS
ISET
ODCLK_T
ODCLK_C
t
F
80%
V(t)
20%
t
R
V
H
V
L
Vx,nom
Vx+
Vx-
ODCLK_T
ODCLK_C
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