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參數資料
型號: 933372690652
廠商: NXP SEMICONDUCTORS
元件分類: 多路復用及模擬開關
英文描述: QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO14
封裝: PLASTIC, SOT-108, SO-14
文件頁數: 6/8頁
文件大小: 76K
代理商: 933372690652
January 1995
6
Philips Semiconductors
Product specication
Quadruple bilateral switches
HEF4016B
gates
Notes
Vis is the input voltage at a Y or Z terminal, whichever is assigned as input.
Vos is the output voltage at a Y or Z terminal, whichever is assigned as output.
1. RL = 10 k to VSS; CL = 50 pF to VSS; En =VDD; Vis =VDD (square-wave); see Figs 6 and 10.
2. RL = 10 k; CL = 50 pF to VSS; En =VDD (square-wave);
Vis =VDD and RL to VSS for tPHZ and tPZH;
Vis =VSS and RL to VDD for tPLZ and tPZL; see Figs 6 and 11.
3. RL = 10 k; CL = 15 pF; En =VDD; Vis = 12VDD(p-p) (sine-wave, symmetrical about 12VDD);
fis = 1 kHz; see Fig.7.
4. RL =1 k; Vis = 12VDD(p-p) (sine-wave, symmetrical about 12VDD);
5. RL = 10 k to VSS; CL = 15 pF to VSS; En =VDD (square-wave); crosstalk is Vos (peak value);
see Fig.6.
6. RL =1 k; CL = 5 pF; En =VSS;Vis = 12VDD(p-p) (sine-wave, symmetrical about 12VDD);
7. RL =1 k; CL = 5 pF; En =VDD;Vis = 12VDD(p-p) (sine-wave, symmetrical about 12VDD);
Note
1. All enable inputs switching.
VDD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
550 fi +∑ (foCL) × VDD2
where
dissipation per
10
2 600 fi +∑ (foCL) × VDD2
fi = input freq. (MHz)
package (P)(1)
15
6 500 fi +∑ (foCL) × VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (f
oCL) = sum of outputs
VDD = supply voltage (V)
20 log
V
os (B)
V
is (A)
-------------------
50 dB; E
n (A)
V
SS E
;
n (B)
=
=
V
DD see Fig. 8.
;
=
20 log
V
os
V
is
---------
50 dB; see Fig. 7.
=
20 log
V
os
V
is
---------
3 dB; see Fig. 7.
=
相關PDF資料
PDF描述
933363610133 0.8 A, 600 V, SILICON, SIGNAL DIODE
933363630113 0.8 A, 1000 V, SILICON, SIGNAL DIODE
933363630133 0.8 A, 1000 V, SILICON, SIGNAL DIODE
933363620133 0.8 A, 800 V, SILICON, SIGNAL DIODE
933363620113 0.8 A, 800 V, SILICON, SIGNAL DIODE
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