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參數資料
| 型號： | 933656140623 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, 50 MHz, PDSO16 |
| 封裝： | PLASTIC, SOT-109, SO-16 |
| 文件頁數： | 3/9頁 |
| 文件大小： | 146K |
| 代理商： | 933656140623 |
Philips Semiconductors
Product specification
NE/SE564
Phase-locked loop
1994 Aug 31
3
TYPICAL PERFORMANCE CHARACTERISTICS
1000
8
6
4
2
100
8
6
4
2
10
0.7
0.8
0.9
1.0
1.1
1.2
1.3
VCC 5V
fo = 5MHz
IPIN = 400A
2
IPIN = 0A
2
INPUT
SIGNAL
LEVEL
–
mV
NORMALIZED LOCK RANGE
105
106
104
103
102
103
104
105
10
1
.1
1
10
FREQUENCY kHz
CAP
ACIT
ANCE
pF
FREQUENCY: 50MHz
1.01
1.00
0.99
0.98
0.97
0.96
–600
A
–400
–200
0
+200
BIAS CURENT (
A), PIN 2
NORMALIZED
VCO
FREQUENCY
VCO FREQUENCY: 50MHz
–600
A –400
–200
0
+200
+400
BIAS CURENT (
A), PIN 2
NORMALIZED
VCO
FREQUENCY
1.10
1.05
1.00
0.95
0.90
BIAS CURRENT: — 200
A
FREQUENCY: 5MHz
FREQUENCY: 500MHz
BIAS CURRENT: — 200
A
1.10
1.05
1.00
0.95
0.90
–50
–25
25
0
25
50
75
100
125
TEMPERATURE (INoC)
NORMALIZED
VCO
FREQUENCY
Lock Range vs Signal Input
VCO Capacitor vs Frequency
Typical Noirmalized VCO
Frequency as a Function of
Pin 2 Bias Current
Typical Noirmalized VCO
Frequency as a Function of
Pin 2 Bias Current
Typical Noirmalized VCO
Frequency as a Function of
Temperature
SR01027
Figure 3. Typical Performance Characteristics
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