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參數資料
| 型號： | 935040890118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 接收器 |
| 英文描述： | FM, AUDIO SINGLE CHIP RECEIVER, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, SOT-266-1, SSOP-20 |
| 文件頁數： | 10/14頁 |
| 文件大小： | 130K |
| 代理商： | 935040890118 |
Philips Semiconductors
Product specification
SA615
High performance low power mixer FM IF system
1997 Nov 07
5
CIRCUIT DESCRIPTION
The SA615 is an IF signal processing system suitable for second IF
or single conversion systems with input frequency as high as 1GHz.
The bandwidth of the IF amplifier is about 40MHz, with 39.7dB(v) of
gain from a 50
source. The bandwidth of the limiter is about
28MHz with about 62.5dB(v) of gain from a 50
source. However,
the gain/bandwidth distribution is optimized for 455kHz, 1.5k
source applications. The overall system is well-suited to battery
operation as well as high performance and high quality products of
all types.
The input stage is a Gilbert cell mixer with oscillator. Typical mixer
characteristics include a noise figure of 5dB, conversion gain of
13dB, and input third-order intercept of –10dBm. The oscillator will
operate in excess of 1GHz in L/C tank configurations. Hartley or
Colpitts circuits can be used up to 100MHz for xtal configurations.
Butler oscillators are recommended for xtal configurations up to
150MHz.
The output of the mixer is internally loaded with a 1.5k
resistor
permitting direct connection to a 455kHz ceramic filter. The input
resistance of the limiting IF amplifiers is also 1.5k
. With most
455kHz ceramic filters and many crystal filters, no impedance
matching network is necessary. To achieve optimum linearity of the
log signal strength indicator, there must be a 12dB(v) insertion loss
between the first and second IF stages. If the IF filter or interstage
network does not cause 12dB(v) insertion loss, a fixed or variable
resistor can be added between the first IF output (Pin 16) and the
interstage network.
The signal from the second limiting amplifier goes to a Gilbert cell
quadrature detector. One port of the Gilbert cell is internally driven
by the IF. The other output of the IF is AC-coupled to a tuned
quadrature network. This signal, which now has a 90
° phase
relationship to the internal signal, drives the other port of the
multiplier cell.
Overall, the IF section has a gain of 90dB. For operation at
intermediate frequencies greater than 455kHz, special care must be
given to layout, termination, and interstage loss to avoid instability.
The demodulated output of the quadrature detector is available at
two pins, one continuous and one with a mute switch. Signal
attenuation with the mute activated is greater than 60dB. The mute
input is very high impedance and is compatible with CMOS or TTL
levels.
A log signal strength completes the circuitry. The output range is
greater than 90dB and is temperature compensated. This log signal
strength indicator exceeds the criteria for AMPs or TACs cellular
telephone.
NOTE: dB(v) = 20log VOUT/VIN
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