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參數(shù)資料
| 型號： | 935069850112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP52 |
| 封裝： | 0.600 INCH, PLASTIC, SOT-247-1, SDIP-52 |
| 文件頁數(shù)： | 13/47頁 |
| 文件大小： | 250K |
| 代理商： | 935069850112 |
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1996 Jan 26
20
Philips Semiconductors
Objective specication
I2C-bus controlled PAL/NTSC TV processors
TDA8376; TDA8376A
LUMINANCE INPUTS AND OUTPUTS (PINS 27 AND 28)
V28(p-p)
output signal voltage amplitude
(peak-to-peak value)
top sync to white
0.45
0.63
V
VTS
top sync voltage level
2.5
V
Zo
output impedance
250
V27(p-p)
input signal voltage amplitude
(peak-to-peak value)
0.45
V
Iclamp
clamping current during burst key
pulse
200
A
Ii
input current
no clamping
0.5
A
Chrominance lters
CHROMINANCE TRAP CIRCUIT
ftrap
trap frequency
fosc
MHz
during SECAM reception
4.2
MHz
QF
trap quality factor
note 8
2
SR
colour subcarrier rejection
20
dB
CHROMINANCE BAND-PASS CIRCUIT
fc
centre frequency
fosc
MHz
QBP
band-pass quality factor
3
Delay line, peaking circuit and black stretcher
Y DELAY LINE
td
delay time
note 2
480
ns
td1
tuning range delay time
8 steps
160
+160
ns
B
bandwidth of internal delay line
note 2
5
MHz
PEAKING CONTROL; note 9
fc(p)
peaking centre frequency
3
MHz
tW
width of preshoot or overshoot
at 50% of pulse; note 2
160
ns
OS
overshoot
positive
20
%
negative
36
%
peaking control curve
16 steps
see Fig.5
GW
wave gain
1.8
CORING STAGE
S
coring range
15
IRE
BLACK LEVEL STRETCHER (PIN 2); note 10
BLSmax
maximum black level shift
15
21
27
IRE
LSH
level shift
100% of peak-white
1
0
+1
IRE
50% of peak-white
1
+3
IRE
15% of peak-white
6
8
10
IRE
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
negative half wave gain
positive half wave gain
--------------------------------------------------------------
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