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參數資料
型號: 935187130557
廠商: NXP SEMICONDUCTORS
元件分類: 畫面疊加
英文描述: PICTURE-IN-PICTURE IC, PQFP100
封裝: PLASTIC, SOT-317-2, QFP-100
文件頁數: 29/43頁
文件大小: 250K
代理商: 935187130557
February 1995
35
Philips Semiconductors
Preliminary specication
Picture-in-Picture (PIP) controller for NTSC
SAB9075H
TEST AND APPLICATION INFORMATION
Fig.20 shows how the ADCs and the DACs can be
connected in the application.
The generation of the reference voltages is carried out
internally and they have to be externally decoupled for AC
signals.
For all ADCs and DACs the internal resistor division is
such that a maximum signal voltage level of 1.5 V is
obtained. For the ADCs there is a DC offset voltage of
0.4 V.
A modification of these reference voltages can be
achieved by external shunting.
The ADC reference voltages are the same for all Y/U/V
channels which means that their input levels need to be
the same. The DAC voltage references can be set
separately for Y/U/V channels. These reference voltages
can be modified by shunting.
The output buffers of the DACS are PMOS source
followers with a minimum output load of 10 k
.
Fig.20 Analog application diagram ADCs and DACs.
handbook, full pagewidth
VIDEO
SIGNAL
PROCESSING
ADC
MY
MU
MV
SY
SU
SV
ADC
DAC
DY
DU
DV
DAC
ADC
MAVDDA
SAV DDA
MAV SSA
SAVSSA
MAV refT
SAV refT
R top
MAVrefB
DAV SSA
DAVDDA
DAVrefTY
DAVrefTU
DAVrefTV
SAV refB
R top
3R top
R bottom
MGC001
相關PDF資料
PDF描述
935188030112 FM, VIDEO DISCRIMINATOR, PDIP32
935190070118 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20
933757480652 8-CHANNEL, SGL ENDED MULTIPLEXER, PDIP20
933774600112 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20
933771700653 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20
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