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參數資料
| 型號： | 935260802112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 偏轉 |
| 英文描述： | HORIZ/VERT DEFLECTION IC, PDIP32 |
| 封裝： | PLASTIC, SDIP-32 |
| 文件頁數： | 14/63頁 |
| 文件大小： | 318K |
| 代理商： | 935260802112 |
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1999 Jul 13
21
Philips Semiconductors
Product specication
I2C-bus autosync deection controllers for
PC/TV monitors
TDA4853; TDA4854
CVAGC
external capacitor at VAGC
(pin 22)
150
220
nF
Differential vertical current outputs
ADJUSTMENT OF VERTICAL SIZE INCLUDING VGA AND EHT COMPENSATION; see Fig.5
VSIZE
vertical size without VGA
overscan (referenced to
nominal vertical size)
register VSIZE = 0;
bit VOVSCN = 0; note 8
60
%
register VSIZE = 127;
bit VOVSCN = 0; note 8
100
%
VSIZEVGA
vertical size with VGA overscan
(referenced to nominal vertical
size)
register VSIZE = 0;
bit VOVSCN = 1; note 8
70
%
register VSIZE = 127;
bit VOVSCN = 1; note 8
115.9
116.8
117.7
%
VSMODEHT
EHT compensation on vertical
size via VSMOD (pin 21)
(referenced to 100% vertical
size)
IVSMOD =0
0
%
IVSMOD = 120 A
7
%
Ii(VSMOD)
input current (pin 21)
VSMOD = 0
0
A
VSMOD =
7%
120
A
Ri(VSMOD)
input resistance
300
500
Vref(VSMOD)
reference voltage at input
5.0
V
fro(VSMOD)
roll-off frequency (
3 dB)
IVSMOD = 60 A
+15
A (RMS)
1
MHz
ADJUSTMENT OF VERTICAL POSITION; see Fig.6
VPOS
vertical position (referenced to
100% vertical size)
register VPOS = 0;
control bit VPC = 0
11.5
%
register VPOS = 127;
control bit VPC = 0
11.5
%
register VPOS = X;
control bit VPC = 1
0
%
ADJUSTMENT OF VERTICAL LINEARITY; see Fig.7
VLIN
vertical linearity (S-correction)
register VLIN = 0;
control bit VSC = 0; note 8
2
%
register VLIN = 15;
control bit VSC = 0; note 8
46
%
register VLIN = X;
control bit VSC = 1; note 8
0
%
δVLIN
symmetry error of S-correction
maximum VLIN
±0.7
%
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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