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參數(shù)資料
| 型號(hào)： | 935261350112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL DECODER, PDIP32 |
| 封裝： | 0.400 INCH, PLASTIC, SOT-232, SDIP-32 |
| 文件頁(yè)數(shù)： | 4/43頁(yè) |
| 文件大小： | 356K |
| 代理商： | 935261350112 |
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1996 Jan 17
12
Philips Semiconductors
Preliminary specication
I2C-bus controlled, alignment-free
PAL/NTSC/SECAM decoder/sync processor
TDA9143
Output port and in/output port
Two stand-alone ports are available for external use.
These ports are I2C-bus controlled, the output port by bus
bit OPB and the input/output port by bus bit OPA. Bus bit
OPA is an open-drain output, to enable input port
functionality. The pin status is read out by bus via output
bit IP.
Sandcastle
Figure 7 illustrates the timing of the acquisition sandcastle
(ASC) and the VA pulse with respect to the input signal.
The sandcastle signal is according to the two-level 5 V
sandcastle format. An external vertical guard current can
overrule the sink current to enable blanking purposes.
handbook, full pagewidth
MBG902
ASC
VA
ASC
VA
ASC
23
625
312
(1)
262
525
17
280
50 Hz
60 Hz
2nd FIELD
1st FIELD
336
2nd FIELD
1st FIELD
2nd FIELD
1st FIELD
2nd FIELD
1st FIELD
Fig.7 Acquisition sandcastle signal and VA pulse timing diagram.
(1) See Vertical Section in “Characteristics”
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