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參數資料
| 型號： | 935261350112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | COLOR SIGNAL DECODER, PDIP32 |
| 封裝： | 0.400 INCH, PLASTIC, SOT-232, SDIP-32 |
| 文件頁數： | 5/43頁 |
| 文件大小： | 356K |
| 代理商： | 935261350112 |
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1996 Jan 17
13
Philips Semiconductors
Preliminary specication
I2C-bus controlled, alignment-free
PAL/NTSC/SECAM decoder/sync processor
TDA9143
I2C-bus
For address 8A, an unconnected pin 22 is sufficient as this pin is also a CVBS output. Do not short-circuit the input to
ground. If the address input is connected to the positive supply rail, the address changes from 8A to 8E.
Table 2
Slave address (8A)
Valid subaddresses: 00 to 03 and 17 to 18 (Hex).
Only the five least significant bits of the subaddress bytes are recognized. Auto-increment mode is available for
subaddresses. The output addresses 00 and 01 can only be read in auto-increment mode. The I2C-bus transceiver is
designed for a maximum clock frequency (fSCL) of 100 kHz.
Table 3
Input bytes
Table 4
Output (status) bytes
Start up procedure: read the status byte until POR = 0; send subaddress 18 with the LPS bit indicating normal operation
(LPS = 0); send subaddress 00 with the crystal indicator bits (XA and XB) indicating that only one crystal is connected
to the IC(1); wait for 50 ms; send subaddress 01; wait for at least 50 ms; set XA,XB to the actual crystal configuration.
Each time before the data in the IC is refreshed, the status byte must be read. If POR = 1, then the above procedure
must be carried out to restart the IC. As long as POR = 1, sending subaddress 01 does not start the line oscillator
calibration. POR is reset when the status register is read out and can only be reset when the supply voltages exceed the
POR detection levels mentioned in the Bias Generator characteristics (see Chapter “Characteristics”).
Failure to stick to the above procedure may result in an incorrect horizontal frequency after power-up or a power-dip.
Remark: if the presence of output signals HA/CLP and/or VA is required after power-up of the IC, subaddress 02 with
the ECL bit indicating ECL = 0 must be sent before sending subaddress 00.
(1) To be absolutely sure that the line oscillator is calibrated with the appropriate crystal frequency data, it is possible to check the
received values of the crystal indication bits via status bits SXA and SXB.
SLAVE ADDRESS
A6
A5
A4
A3
A2
A1
A0
R/W
8A
10001
X
1
X
SUB
ADDRESS
MSB
DATA BYTE
LSB
D7
D6
D5
D4
D3
D2
D1
D0
00
INA
INB
TB
ECMB
FOA
FOB
XA
XB
01
FORF
FORS
OPA
OPB
POC
FM
SAF
FRQF
02
EFS
ECL
HU5
HU4
HU3
HU2
HU1
HU0
03
LCA
FWW
.........
17
HOB
HBC
BSY
18
BPS
LPS
FRGB
EMG
YD3
YD2
YD1
YD0
OUTPUT
ADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
00
POR
FSI
YC
SL
IP
SAK
SBK
FRQ
01
FBA
NRM
SNR
SXA
SXB
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