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參數資料
| 型號： | 935262202112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 偏轉 |
| 英文描述： | VERTICAL DEFLECTION IC, PSIP9 |
| 封裝： | POWER, PLASTIC, SOT-131-2, SIP-9 |
| 文件頁數： | 12/14頁 |
| 文件大?。?/td> | 106K |
| 代理商： | 935262202112 |
1999 Sep 27
7
Philips Semiconductors
Product specication
DC-coupled vertical deection circuit
TDA8356
Notes
1. The linearity error is measured without S-correction and based on the same measurement principle as performed on
the screen. The measuring method is as follows: Divide the output signal I4 I7 (VRM) into 22 equal parts ranging
from 1 to 22 inclusive. Measure the value of two succeeding parts called one block starting with part 2 and 3 (block 1)
and ending with part 20 and 21 (block 10). Thus part 1 and 22 are unused. The equations for linearity error for
adjacent blocks (LEAB) and linearity error for not adjacent blocks (LENAB) are given below:
;
2. Related to VP.
3. The V values within formulae relate to voltages at or across relative pin numbers, i.e. V7-4/V1-2 = voltage value across
pins 7 and 4 divided by voltage value across pins 1 and 2.
4. V9-4 AC short-circuited.
5. Frequency response V7-4/V9-4 is equal to frequency response V7-4/V1-2.
6. At V(ripple) = 500 mV eff; measured across RM; fi = 50 Hz.
Guard circuit
IO
output current
not active;
VO(guard) =0V
50
A
active; VO(guard) = 3.6 V
1
2.5
mA
VO(guard)
output voltage on pin 8
IO = 100 A
4.6
5.5
V
allowable voltage on pin 8
maximum leakage
current = 10
A;
40
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
LEAB
a
k
a
k1
+
()
–
a
avg
----------------------------
=
LENAB
a
max
a
min
–
a
avg
------------------------------
=
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