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參數資料
| 型號： | 935262600518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | COLOR SIGNAL ENCODER, PQFP44 |
| 封裝： | PLASTIC, SOT-307, QFP-44 |
| 文件頁數： | 20/59頁 |
| 文件大小： | 232K |
| 代理商： | 935262600518 |
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2000 Mar 08
27
Philips Semiconductors
Product specication
Digital video encoder
SAA7128H; SAA7129H
Table 42 Subaddress 61H
Table 43 Subaddress 62H
BIT
SYMBOL
DESCRIPTION
7
DOWNB
0 = DACs for R, G and B in normal operational mode
1 = DACs for R, G and B forced to lowest output voltage; default state after reset
6
DOWNA
0 = DACs for CVBS, Y and C in normal operational mode; default state after reset
1 = DACs for CVBS, Y and C forced to lowest output voltage
5
INPI
0 = PAL switch phase is nominal; default state after reset
1 = PAL switch phase is inverted compared to nominal if RTC is enabled (see Table 43).
4
YGS
0 = luminance gain for white
black 100 IRE; default state after reset
1 = luminance gain for white
black 92.5 IRE including 7.5 IRE set-up of black
3
SECAM
0 = no SECAM encoding; default state after reset
1 = SECAM encoding activated; bit PAL has to be set to logic 0
2
SCBW
0 = enlarged bandwidth for chrominance encoding (for overall transfer characteristic of
chrominance in baseband representation see Figs 8 and 9)
1 = standard bandwidth for chrominance encoding (for overall transfer characteristic of
chrominance in baseband representation see Figs 8 and 9); default state after reset
1
PAL
0 = NTSC encoding (non-alternating V component)
1 = PAL encoding (alternating V component); default state after reset
0
FISE
0 = 864 total pixel clocks per line; default state after reset
1 = 858 total pixel clocks per line
BIT
SYMBOL
DESCRIPTION
7
RTCE
0 = no real-time control of generated subcarrier frequency; default state after reset
1 = real-time control of generated subcarrier frequency through SAA7151B or
SAA7111; for timing see Fig.22
6 to 0
BSTA[6:0]
amplitude of colour burst; input representation in accordance with
“ITU-R BT.601”; see
Table 44
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