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| 型號(hào)： | 95V857CGLF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封裝： | 0.240 INCH, TSSOP-48 |
| 文件頁(yè)數(shù)： | 1/15頁(yè) |
| 文件大?。?/td> | 215K |
| 代理商： | 95V857CGLF8 |
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Integrated
Circuit
Systems, Inc.
Preliminary Product Preview
ICS95V857-XXX
0674I—03/28/03
Block Diagram
2.5V Wide Range Frequency Clock Driver (33MHz - 233MHz)
Pin Configuration
48-Pin TSSOP/TVSOP
Recommended Application:
DDR Memory Modules / Zero Delay Board Fan Out
Product Description/Features:
Low skew, low jitter PLL clock driver
1 to 10 differential clock distribution (SSTL2)
Feedback pins for input to output synchronization
PD# for power management
Spread Spectrum-tolerant inputs
Auto PD when input signal removed
Choice of static phase offset available,
for easy board tuning;
-XXX = device pattern number for options listed
below.
- ICS95V857 ............. 0ps
- ICS95V857-130 .. +50ps
Specifications:
Meets or exceeds JEDEC standard #82-1 for
registered DDR clock driver.
Meets or exceeds proposed DDR1-400 specifications
Covers all DDR1 speed grades
Switching Characteristics:
CYCLE - CYCLE jitter (>100MHz):<50ps
OUTPUT - OUTPUT skew: <30ps
Output Rise and Fall Time: 650ps - 950ps
DUTY CYCLE: 49.5% - 50.5%
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Functionality
PLL
FB_INT
FB_INC
CLK_INC
CLK_INT
PD#
Control
Logic
FB_OUTT
FB_OUTC
CLKT0
CLKT1
CLKT2
CLKT3
CLKT4
CLKT5
CLKT6
CLKT7
CLKT8
CLKT9
CLKC0
CLKC1
CLKC2
CLKC3
CLKC4
CLKC5
CLKC6
CLKC7
CLKC8
CLKC9
6.10 mm Body, 0.50 mm Pitch = TSSOP
4.40 mm Body, 0.40 mm Pitch = TVSOP
GND
CLKC0
CLKT0
VDD
CLKT1
CLKC1
GND
CLKC2
CLKT2
VDD
CLK_INT
CLK_INC
VDD
AVDD
AGND
GND
CLKC3
CLKT3
VDD
CLKT4
CLKC4
GND
CLKC5
CLKT5
VDD
CLKT6
CLKC6
GND
CLKC7
CLKT7
VDD
PD#
FB_INT
FB_INC
VDD
FB_OUTC
FB_OUTT
GND
CLKC8
CLKT8
VDD
CLKT9
CLKC9
GND
ICS95V857-XXX
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PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are
subject to change without notice.
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| 95VLP857AKLF-T | PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40 |
| 95VLP857AGLF-T | PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
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