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參數(shù)資料
| 型號： | A3PN125-2VQ100I |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 3072 CLBS, 125000 GATES, PQFP100 |
| 封裝： | 14 X 14 MM, 1.20 MM HEIGHT, 0.50 MM PITCH, VQFP-100 |
| 文件頁數(shù)： | 12/106頁 |
| 文件大小： | 3324K |
| 代理商： | A3PN125-2VQ100I |
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ProASIC3 nano Flash FPGAs
R e visio n 8
1 -7
Global Clocking
ProASIC3 nano devices have extensive support for multiple clocking domains. In addition to the CCC
and PLL support described above, there is a comprehensive global clock distribution network.
Each VersaTile input and output port has access to nine VersaNets: six chip (main) and three quadrant
global networks. The VersaNets can be driven by the CCC or directly accessed from the core via
multiplexers (MUXes). The VersaNets can be used to distribute low-skew clock signals or for rapid
distribution of high fanout nets.
I/Os with Advanced I/O Standards
ProASIC3 nano FPGAs feature a flexible I/O structure, supporting a range of voltages (1.5 V, 1.8 V,
2.5 V, and 3.3 V).
The I/Os are organized into banks, with two, three, or four banks per device. The configuration of these
banks determines the I/O standards supported.
Each I/O module contains several input, output, and enable registers. These registers allow the
implementation of various single-data-rate applications for all versions of nano devices and double-data-
rate applications for the A3PN060, A3PN125, and A3PN250 devices.
ProASIC3 nano devices support LVTTL and LVCMOS I/O standards, are hot-swappable, and support
cold-sparing and Schmitt trigger.
Hot-swap (also called hot-plug, or hot-insertion) is the operation of hot-insertion or hot-removal of a card
in a powered-up system.
Cold-sparing (also called cold-swap) refers to the ability of a device to leave system data undisturbed
when the system is powered up, while the component itself is powered down, or when power supplies
are floating.
Wide Range I/O Support
Actel nano devices support JEDEC-defined wide range I/O operation. ProASIC3 nano supports the
JESD8-B specification, covering both 3 V and 3.3 V supplies, for an effective operating range of 2.7 V to
3.6 V.
Wider I/O range means designers can eliminate power supplies or power conditioning components from
the board or move to less costly components with greater tolerances. Wide range eases I/O bank
management and provides enhanced protection from system voltage spikes, while providing the flexibility
to easily run custom voltage applications.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A3PN125-2VQ100 | FPGA, 3072 CLBS, 125000 GATES, PQFP100 |
| A3PN125-2VQG100I | FPGA, 3072 CLBS, 125000 GATES, PQFP100 |
| A3PN125-2VQG100 | FPGA, 3072 CLBS, 125000 GATES, PQFP100 |
| A3PN125-VQ100I | FPGA, 3072 CLBS, 125000 GATES, PQFP100 |
| A3PN125-VQ100 | FPGA, 3072 CLBS, 125000 GATES, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A3PN125-2VQG100 | 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN125-2VQG100I | 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN125-DIELOT | 制造商:Microsemi Corporation 功能描述:A3PN125-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film |
| A3PN125-VQ100 | 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN125-VQ100I | 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
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