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參數資料
| 型號： | AD6642BBCZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Dual IF Receiver; Package: Chip Scale BGA; No of Pins: 144; Temperature Range: Ind |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PBGA144 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MO-205AC, CSPBGA-144 |
| 文件頁數： | 1/32頁 |
| 文件大小： | 1032K |
| 代理商： | AD6642BBCZ |
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Dual IF Receiver
AD6642
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2009–2010 Analog Devices, Inc. All rights reserved.
FEATURES
11-bit, 200 MSPS output data rate per channel
Integrated noise shaping requantizer (NSR)
Performance with NSR enabled
SNR: 75.5 dBFS in 40 MHz band to 70 MHz @ 185 MSPS
SNR: 73.7 dBFS in 60 MHz band to 70 MHz @ 185 MSPS
Performance with NSR disabled
SNR: 66.5 dBFS to 70 MHz @ 185 MSPS
SFDR: 83 dBc to 70 MHz @ 185 MSPS
Low power: 0.62 W @ 185 MSPS
1.8 V analog supply operation
1.8 V LVDS (ANSI-644 levels) output
1-to-8 integer clock divider
Internal ADC voltage reference
1.75 V p-p analog input range (programmable to 2.0 V p-p)
Differential analog inputs with 800 MHz bandwidth
95 dB channel isolation/crosstalk
Serial port control
User-configurable built-in self-test (BIST) capability
Energy-saving power-down modes
APPLICATIONS
Communications
Diversity radio and smart antenna (MIMO) systems
Multimode digital receivers (3G)
WCDMA, LTE, CDMA2000
WiMAX, TD-SCDMA
I/Q demodulation systems
General-purpose software radios
FUNCTIONAL BLOCK DIAGRAM
VIN+A
D0±AB
D10±AB
VIN–A
PIPELINE
ADC
NOISE SHAPING
REQUANTIZER
VIN+B
VIN–B
PIPELINE
ADC
SERIAL PORT
REFERENCE
14
11
NOISE SHAPING
REQUANTIZER
AD6642
DA
TA
MU
LT
IP
L
E
XE
R
AN
D
LV
DS
DRI
V
E
RS
14
11
CLOCK
DIVIDER
VCMA
VCMB
DC0±AB
SCLK
SDIO
CSB
CLK+
AVDD
AGND
DRVDD
DRGND
CLK–
MODE
SYNC
PDWN
0
8
563
-00
1
Figure 1.
PRODUCT HIGHLIGHTS
1.
Two ADCs are contained in a small, space-saving,
10 mm × 10 mm × 1.4 mm, 144-ball CSP_BGA package.
2.
Pin selectable noise shaping requantizer (NSR) function
that allows for improved SNR within a reduced bandwidth
of up to 60 MHz at 185 MSPS.
3.
LVDS digital output interface configured for low cost
FPGA families.
4.
120 mW per ADC core power consumption.
5.
Operation from a single 1.8 V supply.
6.
Standard serial port interface (SPI) that supports various
product features and functions, such as data formatting
(offset binary or twos complement), NSR, power-down,
test modes, and voltage reference mode.
7.
On-chip integer 1-to-8 input clock divider and multichip
sync function to support a wide range of clocking schemes
and multichannel subsystems.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD6642BBCZRL | 功能描述:IC IF RCVR 11BIT 200MSPS 144BGA RoHS:是 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD6642EBZ | 功能描述:BOARD EVALUATION FOR AD6642 RoHS:是 類別:RF/IF 和 RFID >> RF 評估和開發套件，板 系列:- 標準包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關產品:- 已供物品:模塊 其它名稱:SER3796 |
| AD6643 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual IF Receiver 1.8 V supply voltages Internal ADC voltage reference |
| AD6643-200EBZ | 功能描述:BOARD EVALUATION FOR AD6643 RoHS:是 類別:RF/IF 和 RFID >> RF 評估和開發套件，板 系列:- 標準包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關產品:- 已供物品:模塊 其它名稱:SER3796 |
| AD6643-250EBZ | 功能描述:IC IF RCVR 11BIT 250MSPS 64LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 評估和開發套件，板 系列:- 標準包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關產品:- 已供物品:模塊 其它名稱:SER3796 |
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