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參數(shù)資料
型號: AD760
廠商: Analog Devices, Inc.
英文描述: 16/18-Bit Self-Calibrating Serial/Byte DACPORT(16/18位自校準(zhǔn)單片D/A轉(zhuǎn)換器)
中文描述: 16/18-Bit自校準(zhǔn)串行/字節(jié)DACPORT(16/18位自校準(zhǔn)單片的D / A轉(zhuǎn)換器)
文件頁數(shù): 3/12頁
文件大小: 333K
代理商: AD760
AD760
REV. A
–3–
NOTES
1
For 18-bit resolution, 1 LSB = 0.00038% of FSR. For 16-bit resolution, 1 LSB = 0.0015% of FSR. For 14-bit resolution, 1 LSB = 0.006% of FSR. FSR stands for
full-scale range and is 10 V in unipolar mode and 20 V in bipolar mode.
2
Characteristics are guaranteed at V
OUT
Pin (23).
3
T
CAL
is the calibration temperature.
4
Gain Error is measured with a fixed 50 resistor as shown in Figure 5a and Figure 6a.
5
Gain Error and gain drift are measured with the internal reference. The internal reference is the main contributor to the gain drift. If lower drift is required, the
AD760 can be used with a precision external reference such as the AD587, AD586 or AD688.
6
DAC Gain Error is measured without the on-chip voltage reference. It represents the performance that can be obtained with an external precision reference.
7
External current is defined as the current available in addition to that supplied to REF IN and SPAN/BIPOLAR OFFSET on the AD760.
8
Operation on ±12 V supplies is possible using an external reference such as the AD586 and reducing the output range. Refer to the Internal/External Reference
section.
Specifications subject to change without notice.
AC PERFORMANCE CHARACTERISTICS
Ratio, these characteristics are included for design guidance only and are not subject to test. THD+N and SNR are 100% tested. (T
MIN
< T
A
< T
MAX
, V
CC
= +15 V, V
EE
= –15 V, V
LL
= +5 V, tested at V
OUT
except where noted.)
Parameter
Limit
Units
Test Conditions/Comments
Output Settling Time
(Time to +0.0008% FS, with
2 k , 1000 pF Load)
13
8
10
6
8
2.5
μs max
μs typ
μs typ
μs typ
μs typ
μs typ
20 V Step, T
A
= +25°C
20 V Step, T
A
= +25°C
20 V Step
10 V Step, T
A
= +25°C
10 V Step
1 LSB Step
MUX
OUT
Recovery Time
(Time to +0.0008% FS, with
100 pF Load)
Recovery time is referenced to the rising edge of CALOK,
when MUX
OUT
switches from MUX
IN
to V
OUT
.
MUX
IN
= V
OUT
prior to calibration.
MUX
IN
, V
OUT
= –10 V to +10 V
2
μs typ
Total Harmonic Distortion + Noise
A, S Grade
A, S Grade
A, S Grade
0.005
0.03
3.0
% max
% max
% max
0 dB, 1001 Hz. Sample Rate = 100 kHz. T
A
= +25°C
–20 dB, 1001 Hz. Sample Rate = 100 kHz. T
A
= +25°C
–60 dB, 1001 Hz. Sample Rate = 100 kHz. T
A
= +25°C
Signal-to-Noise Ratio
94
dB min
T
A
= +25°C, byte load
Digital-to-Analog Glitch Impulse
15
nV-s typ
DAC alternately loaded with 8000
H
and 7FFF
H
MUX
OUT
Glitch Impulse
30
nV-s typ
100 pF Load. MUX
IN
= V
OUT
= negative full scale
Digital Feedthrough
2
nV-s typ
DAC alternately loaded with 0000
H
and FFFF
H
.
CS
high
Output Noise Voltage Density (1 kHz–1 MHz)
120
nV/
Hz
typ
Measured at V
OUT
, 20 V span, excludes internal reference
Reference Noise (1 kHz–1 MHz)
125
nV/
Hz
typ
Measured at REF OUT
Specifications are subject to change without notice.
With the exception of Total Harmonic Distortion + Noise and Signal-to-Noise
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