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| 型號： | AD7655AST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Low Cost 4-Channel 1 MSPS 16-Bit ADC |
| 中文描述： | 4-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQFP48 |
| 封裝： | SEPOSEDPAD, MS-026BBC, LQFP-48 |
| 文件頁數： | 13/20頁 |
| 文件大小： | 684K |
| 代理商： | AD7655AST |
REV. 0
AD7655
–13–
TYPICAL CONNECTION DIAGRAM
Figure 4 shows a typical connection diagram for the AD7655.
Different circuitry shown on this diagram is optional and is
discussed below.
Analog Inputs
Figure 5 shows a simplified analog input section of the AD7655.
INA1
R
A
= 500
INB2
R
B
= 500
C
S
C
S
AGND
AVDD
INA2
INAN
INBN
INB1
Figure 5. Simplified Analog Input
The diodes shown in Figure 5 provide ESD protection for the
inputs. Care must be taken to ensure that the analog input signal
never exceeds the absolute ratings on these inputs. This will cause
these diodes to become forward-biased and start conducting
current. These diodes can handle a forward-biased current of
120 mA maximum. This condition could eventually occur when
the input buffer
’
s (U1) or (U2) supplies are different from AVDD.
In such a case, an input buffer with a short-circuit current
limitation can be used to protect the part.
This analog input structure allows the sampling of the differential
signal between INx and INxN. Unlike other converters, the INxN is
sampled at the same time as the INx input. By using these differ-
ential inputs, small signals common to both inputs are rejected.
During the acquisition phase, for ac signals, the AD7655 behaves
like a one-pole RC filter consisting of the equivalent resistance
R
A
, R
B
,
and C
S
. The resistors R
A
and R
B
are typically 500
W
and
are a lumped component made up of some serial resistance and the
on resistance of the switches. The capacitor C
S
is typically 32 pF
and is mainly the ADC sampling capacitor. This one-pole filter
with a typical
–
3 dB cutoff frequency of 10 MHz reduces unde-
sirable aliasing effects and limits the noise coming from the inputs.
Because the input impedance of the AD7655 is very high, the
AD7655 can be driven directly by a low impedance source without
gain error. As shown in Figure 4, that allows an external one-pole
RC filter between the output of the amplifier output and the
ADC analog inputs to even further improve the noise filtering
done by the AD7655 analog input circuit. However, the source
impedance has to be kept low because it affects the ac perfor-
mances, especially the total harmonic distortion. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD degrades with
the increase of the source impedance.
Driver Amplifier Choice
Although the AD7655 is easy to drive, the driver amplifier needs
to meet at least the following requirements:
∑
The driver amplifier and the AD7655 analog input circuit
have to be able to settle for a full-scale step of the capacitor
array at a 16-bit level (0.0015%). In the amplifier
’
s data sheet,
the settling at 0.1% or 0.01% is more commonly specified.
It could significantly differ from the settling time at a 16-bit
level and, therefore, it should be verified prior to the driver
selection. The tiny op amp AD8021, which combines ultra-
low noise and a high gain bandwidth, meets this settling time
requirement even when used with a high gain of up to 13.
The noise generated by the driver amplifier needs to be kept
as low as possible in order to preserve the SNR and transition
noise performance of the AD7655. The noise coming from
the driver is filtered by the AD7655 analog input circuit
one-pole low-pass filter made by R
A
,
R
B
, and C
S
.
The driver needs to have a THD performance suitable to
that of the AD7655.
The AD8021 meets these requirements and is usually appropriate
for almost all applications. The AD8021 needs an external
compensation capacitor of 10 pF. This capacitor should have
good linearity as an NPO ceramic or mica type.
The AD8022 could also be used where a dual version is needed
and a gain of 1 is used.
The AD829 is another alternative where high frequency (above
100 kHz) performance is not required. In a gain of 1, it requires
an 82 pF compensation capacitor.
The AD8610 is also an option where low bias current is needed
in low frequency applications.
Voltage Reference Input
The AD7655 requires an external 2.5 V reference. The reference
input should be applied to REF, REFA for Channel A, and to
REFB for Channel B. The voltage reference input REF of the
AD7655 has a dynamic input impedance; it should therefore be
driven by a low impedance source with an efficient decoupling.
This decoupling depends on the choice of the voltage reference
but usually consists of a 1
m
F ceramic capacitor and a low ESR
tantalum capacitor connected to the REFA, REFB, and REFGND
inputs with minimum parasitic inductance. 47
m
F is an appro-
priate value for the tantalum capacitor when using one of the
recommended reference voltages:
∑
The low noise, low temperature drift AD780 voltage reference
∑
The low cost AD1582 voltage reference
For applications using multiple AD7655s, it is more effective to
buffer the reference voltage using the internal buffer. Each ADC
should be decoupled individually.
Care should also be taken with the reference temperature coeffi-
cient of the voltage reference, which directly affects the full-scale
accuracy if this parameter is applicable. For instance, a
±
15 ppm/
∞
C
tempco of the reference changes the full scale by
±
1 LSB/
∞
C.
Power Supply
The AD7655 uses three sets of power supply pins: an analog 5 V
supply AVDD, a digital 5 V core supply DVDD, and a digital
input/output interface supply OVDD. The OVDD supply allows
direct interface with any logic working between 2.7 V and DVDD
+ 0.3 V. To reduce the number of supplies needed, the digital core
(DVDD) can be supplied through a simple RC filter from the
analog supply, as shown in Figure 5. The AD7655 is independent
of power supply sequencing, once OVDD does not exceed DVDD
by more than 0.3 V, and thus is free from supply voltage induced
latchup. Additionally, it is very insensitive to power supply
variations over a wide frequency range, as shown in Figure 6.
∑
∑
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