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參數(shù)資料
| 型號(hào)： | AD7685 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | ADC |
| 英文描述： | 3mW, 100kSPS, 14-Bit ADC in 6-Lead SOT-23 |
| 中文描述： | 3MW的，100ksps的14位ADC的6引腳SOT - 23 |
| 文件頁數(shù)： | 18/20頁 |
| 文件大小： | 480K |
| 代理商： | AD7685 |
AD7940
For example, if the ADSP-2189 had a 20 MHz crystal, such that
it had a master clock frequency of 40 MHz, the master cycle
time would be 25 ns. If the SCLKDIV register is loaded with the
value 7, then a SCLK of 2.5 MHz is obtained, and 16 master
clock periods will elapse for every 1 SCLK period. Depending
on the throughput rate selected, if the timer register was loaded
with the value 803 (803 + 1 = 804), then 50.25 SCLKs will occur
between interrupts and subsequently between transmit instruc-
tions. This situation will result in nonequidistant sampling since the
transmit instruction is occurring on a SCLK edge. If the number of
SCLKs between interrupts is a whole integer figure of N, then equi-
distant sampling will be implemented by the DSP.
Rev. 0 | Page 18 of 20
AD7940 TO DSP563xx
The connection diagram in Figure 23 shows how the AD7940
can be connected to the ESSI (synchronous serial interface) of
the DSP-563xx family of DSPs from Motorola. Each ESSI (two
on board) is operated in synchronous mode (SYN bit in CRB =
1) with internally generated 1-bit clock period frame sync for
both Tx and Rx (Bits FSL1 = 0 and FSL0 = 0 in CRB). Normal
operation of the ESSI is selected by making MOD = 0 in the
CRB. Set the word length to 16 by setting bits WL1 = 1 and WL0
= 0 in CRA. The FSP bit in the CRB should be set to 1 so that
the frame sync is negative. It should be noted that for signal
processing applications, it is imperative that the frame synchro-
nization signal from the DSP-563xx provide equidistant
sampling.
In the example shown in Figure 23, the serial clock is taken from
the ESSI so the SCK0 pin must be set as an output, SCKD = 1.
0
SCLK
AD7940*
DOUT
CS
DSP-563xx*
SCK
*ADDITIONAL PINS OMITTED FOR CLARITY
SRD
STD
Figure 23. Interfacing to the DSP-563xx
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| AD76851 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 500 kSPS PulSAR ADC in MSOP |
| AD7685ACPZRL | 功能描述:IC ADC 16BIT SAR 250KSPS 10LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
| AD7685ACPZRL7 | 功能描述:IC ADC 16BIT SAR 250KSPS 10LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
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| AD7685ARMRL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 250ksps 16-bit Serial 10-Pin MSOP T/R |
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