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參數(shù)資料
| 型號： | AD7701 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | LC2MOS 16-Bit A/D Converter |
| 中文描述： | LC2MOS 16位A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大小： | 312K |
| 代理商： | AD7701 |
REV. D
–2–
(T
A
= +25
8
C; AV
DD
= DV
DD
= +5 V; AV
SS
= DV
SS
= –5 V; V
REF
= +2.5 V; f
CLKIN
=
4.096MHz; Bipolar Mode: MODE = +5 V; A
IN
Source Resistance = 1k
V
1
wth 1 nF to
AGND at A
IN
, unless otherwse noted.)
AD7701–SPECIFICATIONS
Parameter
A, S Versions
2
B, T Versions
2
Units
T est Conditions/Comments
ST AT IC PERFORMANCE
Resolution
Integral Nonlinearity
T
MIN
to T
MAX
16
16
Bits
±
0.0007
±
0.0015
% FSR typ
% FSR max
±
0.003
Differential Nonlinearity
T
MIN
to T
MAX
±
0.125
±
0.5
±
0.13
±
0.5
±
1.2 (
±
2.3 S Version)
±
0.25
±
1
±
1.6 (+3/–25 S Version)
±
0.25
±
1
±
0.8 (+1.5/–12.5 S Version)
±
0.5
±
2
±
0.6 (
±
1.2 S Version)
0.1
±
0.125
±
0.5
±
0.13
±
0.5
±
1.2 (
±
2.3 T Version)
±
0.25
±
1
±
1.6 (+3/–25 T Version)
±
0.25
±
1
±
0.8 (+1.5/–12.5 T Version)
±
0.5
±
2
±
0.6 (
±
1.2 T Version)
0.1
LSB typ
LSB max
LSB typ
LSB max
LSB typ
LSB typ
LSB max
LSB typ
LSB typ
LSB max
LSB typ
LSB typ
LSB max
LSB typ
LSB rms typ
Guaranteed No Missing Codes
Positive Full-Scale Error
3
Full-Scale Drift
4
Unipolar Offset Error
3
Unipolar Offset Drift
4
Bipolar Zero Error
3
Bipolar Zero Drift
4
Bipolar Negative Full-Scale Error
3
Bipolar Negative Full-Scale Drift
4
Noise (Referred to Output)
DYNAMIC PERFORMANCE
Sampling Frequency, f
S
Output Update Rate, f
OUT
Filter Corner Frequency, f
–3 dB
Settling T ime to
±
0.0007% FS
f
CLK IN
/256
f
CLK IN
/1024
f
CLK IN
/409,600
507904/f
CLK IN
f
CLK IN
/256
f
CLK IN
/1024
f
CLK IN
/409,600
507904/f
CLK IN
Hz
Hz
Hz
sec
For Full-Scale Input Step
SYST EM CALIBRAT ION
Positive Full-Scale Overrange
Positive Full-Scale Overrange
Negative Full-Scale Overrange
Maximum Offset Calibration Range
5, 6
Unipolar Input Range
Bipolar Input Range
Input Span
7
Applies to Unipolar and
Bipolar Ranges. After Cali-
bration, If A
IN
> V
REF
, the
Device Will Output All 1s
If A
IN
< 0 (Unipolar) or
–V
REF
(Bipolar), the Device
Will Output All 0s.
V
REF
+ 0.1
V
REF
+ 0.1
–(V
REF
+ 0.1)
V
REF
+ 0.1
V
REF
+ 0.1
–(V
REF
+ 0.1)
V max
V max
V max
–(V
REF
+ 0.1)
–0.4 V
REF
to +0.4 V
REF
0.8 V
REF
2 V
REF
+ 0.2
–(V
REF
+ 0.1)
–0.4 V
REF
to +0.4 V
REF
0.8 V
REF
2 V
REF
+ 0.2
V max
V max
V min
V max
ANALOG INPUT
Unipolar Input Range
Bipolar Input Range
Input Capacitance
Input Bias Current
1
0 to +2.5
±
2.5
10
1
0 to +2.5
±
2.5
10
1
Volts
Volts
pF typ
nA typ
LOGIC INPUT S
All Inputs Except CLK IN
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
CLK IN
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
I
IN
, Input Current
0.8
2.0
0.8
2.0
V max
V min
0.8
3.5
10
0.8
3.5
10
V max
V min
μ
A max
LOGIC OUT PUT S
V
OL
, Output Low Voltage
V
OH
, Output High Voltage
Floating State Leakage Current
Floating State Output Capacitance
0.4
DV
DD
– 1
±
10
9
0.4
DV
DD
– 1
±
10
9
V max
V min
μ
A max
pF typ
I
SINK
= 1.6 mA
I
SOURCE
= 100
μ
A
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