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參數(shù)資料
型號: AD7708BR
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: Shaft; Style: 2 - light; Applicable Model: LE-P / LEL-W
中文描述: 10-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 25/44頁
文件大小: 339K
代理商: AD7708BR
REV. 0
AD7708/AD7718
–25–
Communications Register (A3, A2, A1, A0 = 0, 0, 0, 0)
The Communications Register is an 8-bit write-only register. All communications to the part must start with a write operation to the
Communications Register. The data written to the Communications Register determines whether the next operation is a read or write
operation, the type of read operation, and on which register this operation takes place. For read or write operations, once the subse-
quent read or write operation to the selected register is complete, the interface returns to where it expects a write operation to the
Communications Register. This is the default state of the interface and, on power-up or after a
RESET
, the AD7708/AD7718 is in
this default state waiting for a write operation to the Communications Register. In situations where the interface sequence is lost, a
write operation of at least 32 serial clock cycles with DIN high returns the AD7708/AD7718 to this default state by resetting the part.
Table XII outlines the bit designations for the Communications Register. CR0 through CR7 indicate the bit location, CR denoting
the bits are in the Communications Register. CR7 denotes the first bit of the data stream.
7
R
C
6
R
C
5
R
C
4
R
C
3
R
C
2
R
C
1
R
C
0
R
C
N
E
W
)
0
(
/
R
W
)
0
(
)
0
(
0
)
0
(
0
)
0
(
3
A
)
0
(
2
A
)
0
(
1
A
)
0
(
0
A
Table XII. Communications Register Bit Designations
Bit
Location
Bit
Mnemonic
Description
CR7
WEN
Write Enable Bit. A 0 must be written to this bit so the write operation to the Communications Register
actually takes place. If a 1 is written to this bit, the part will not clock on to subsequent bits in the regis
ter. It will stay at this bit location until a 0 is written to this bit. Once a 0 is written to the
WEN
bit, the
next seven bits will be loaded to the Communications Register.
A zero in this bit location indicates that the next operation will be a write to a specified register. A one in
this position indicates that the next operation will be a read from the designated register.
A zero must be written to this bit position to ensure correct operation of the AD7708/AD7718.
A zero must be written to this bit position to ensure correct operation of the AD7708/AD7718.
Register Address Bits. These address bits are used to select which of the AD7708/AD7718’s registers are
being accessed during this serial interface communication. A3 is the MSB of the three selection bits.
CR6
R/
W
CR5
CR4
CR3–CR0
0
0
A3–A0
Table XIII. Register Selection Table
A3
A2
A1
A0
Register
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Communications Register during a Write Operation
Status Register during a Read Operation
Mode Register
ADC Control Register
Filter Register
ADC Data Register
ADC Offset Register
ADC Gain Register
I/O Control Register
Undefined
Undefined
Undefined
Undefined
Test 1 Register
Test 2 Register
Undefined
ID Register
相關(guān)PDF資料
PDF描述
AD7708BRU 8-/10-Channel, Low Voltage, Low Power, ADCs
AD7708 8-/10-Channel, Low Voltage, Low Power, ADCs
AD7718 8-/10-Channel, Low Voltage, Low Power, ADCs
AD7718BR 8-/10-Channel, Low Voltage, Low Power, ADCs
AD7718BRU 8-/10-Channel, Low Voltage, Low Power, ADCs
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