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參數(shù)資料
| 型號： | AD7714AR-5 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Metal Oxide Varistor (MOV); Voltage Rating AC, Vrms:680Vrms; Voltage Rating DC, Vdc:895VDC; Peak Surge Current (8/20uS), Itm:4500A; Clamping Voltage 8/20us Max :1815V; Capacitance, Cd:140pF; Package/Case:14mm Disc |
| 中文描述： | 5-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | WSOIC-24 |
| 文件頁數(shù)： | 33/40頁 |
| 文件大小： | 306K |
| 代理商： | AD7714AR-5 |
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2
AD7714
REV. C
–33–
Table XV. C Code for Interfacing AD7714 to 68HC11
/* This program has read and write routines for the 68HC11 to interface to the AD7714 and the sample
program sets the various registers and then reads 1000 samples from the part. */
#include <math.h>
#include <io6811.h>
#define NUM_SAMPLES 1000 /* change the number of data samples */
#define MAX_REG_LENGTH 3 /* this says that the max length of a register is 3 bytes */
Writetoreg (int);
Read (int,char);
char *datapointer = store;
char store[NUM_SAMPLES*MAX_REG_LENGTH + 30];
void main()
{
/* the only pin that is programmed here from the 68HC11 is the /CS and this is why the PC2 bit
of PORTC is made as an output */
char a;
DDRC = 0x04; /* PC2 is an output the rest of the port bits are inputs */
PORTC | = 0x04; /* make the /CS line high */
Writetoreg(0x27); /* set the channel AIN6/AIN6 and set the next operation as write to the filter high
register */
Writetoreg(0x4f); /* set Bipolar mode, 24 bits, boost off, all 4 MSBs of filterword to 1 */
Writetoreg(0x37); /* set the next operation as a write to the filter low register */
Writetoreg(0xA0); /* max filter word allowed for low part of the filterword */
Writetoreg(0x17); /* set the operation as a write to the mode register */
Writetoreg(0x20); /* set gain to 1, burnout current off, no filter sync, and do a self calibration */
while(PORTC & 0x10); /* wait for /DRDY to go low */
for(a=0;a<NUM_SAMPLES;a++);
{
Writetoreg(0x5f); /*set the next operation for 24 bit read from the data register */
Read(NUM_SAMPES,3);
}
}
Writetoreg(int byteword);
{
int q;
SPCR = 0x3f;
SPCR = 0X7f; /* this sets the WiredOR mode(DWOM=1), Master mode(MSTR=1), SCK idles high(CPOL=1), /SS
can be low always (CPHA=1), lowest clock speed(slowest speed which is master clock /32 */
DDRD = 0x18; /* SCK, MOSI outputs */
q = SPSR;
q = SPDR; /* the read of the staus register and of the data register is needed to clear the interrupt
which tells the user that the data transfer is complete */
PORTC &= 0xfb; /* /CS is low */
SPDR = byteword; /* put the byte into data register */
while(!(SPSR & 0x80)); /* wait for /DRDY to go low */
PORTC |= 0x4; /* /CS high */
}
Read(int amount, int reglength)
{
int q;
SPCR = 0x3f;
SPCR = 0x7f; /* clear the interupt */
DDRD = 0x10; /* MOSI output, MISO input, SCK output */
while(PORTC & 0x10); /* wait for /DRDY to go low */
PORTC & 0xfb ; /* /CS is low */
for(b=0;b<reglength;b++)
{
SPDR = 0;
while(!(SPSR & 0x80)); /* wait until port ready before reading */
*datapointer++=SPDR; /* read SPDR into store array via datapointer */
}
PORTC|=4; /* /CS is high */
}
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