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參數資料
| 型號： | AD774BJN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Complete 12-Bit A/D Converters |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數： | 2/12頁 |
| 文件大小： | 247K |
| 代理商： | AD774BJN |
J Grade
Min Typ
K Grade
Max Min Typ Max
A Grade
Min Typ Max
B Grade
Min Typ Max
T Grade
Min
Model (AD674B or AD774B)
Typ Max
Unit
RESOLUTION
12
12
12
12
12
Bits
LINEARITY ERROR @ 25
°
C
T
MIN
to T
MAX
1
1
1/2
1/2
1
1
1/2
1/2
1/2
1
LSB
LSB
DIFFERENTIAL LINEARITY ERROR
(Minimum Resolution for Which No
Missing Codes are Guaranteed)
12
12
12
12
12
Bits
UNIPOLAR OFFSET
1
@ 25
°
C
2
2
2
2
2
LSB
BIPOLAR OFFSET
1
@ 25
°
C
6
3
6
3
3
LSB
FULL-SCALE CALIBRATION ERROR
1, 2
@ 25
°
C (with Fixed 50
Resistor
from REF OUT to REF IN)
0.1
0.25
0.1
0.125
0.1
0.25
0.1
0.125
0.1
0.125
% of FS
TEMPERATURE RANGE
0
70
0
70
–40
+85
–40
+85
–55
+125
°
C
TEMPERATURE DRIFT
3
(Using Internal Reference)
Unipolar
Bipolar Offset
Full-Scale Calibration
2
2
6
1
1
2
2
2
8
1
1
5
1
2
7
LSB
LSB
LSB
POWER SUPPLY REJECTION
Max Change in Full-Scale Calibration
V
CC
= +15 V
±
1.5 V or +12 V
±
0.6 V
V
LOGIC
= +5 V
±
0.5 V
V
EE
= –15 V
±
1.5 V or –12 V
±
0.6 V
2
1/2
2
1
1/2
1
2
1/2
2
1
1/2
1
1
1/2
1
LSB
LSB
LSB
ANALOG INPUT
Input Ranges
Bipolar
–5
–10
0
0
+5
+10
10
20
–5
–10
0
0
+5
+10
10
20
–5
–10
0
0
+5
+10
10
20
–5
–10
0
0
+5
+10
10
20
–5
–10
0
0
+5
+10
10
20
V
V
V
V
Unipolar
Input Impedance
10 V Span
20 V Span
3
6
5
10
7
14
3
6
5
10
7
14
3
6
5
10
7
14
3
6
5
10
7
14
3
6
5
10
7
14
k
k
POWER SUPPLIES
Operating Range
V
LOGIC
V
CC
V
EE
Operating Current
I
LOGIC
I
CC
I
EE
4.5
11.4
–16.5
5.5
16.5
–11.4 –16.5
4.5
11.4
5.5
16.5
–11.4
4.5
11.4
–16.5
5.5
16.5
–11.4
4.5
11.4
–16.5
5.5
16.5
–11.4 –16.5
4.5
11.4
5.5
16.5
–11.4
V
V
V
3.5
3.5
10
7
7
14
3.5
3.5
10
7
7
14
3.5
7
3.5
7
10
3.5
3.5
10
7
7
14
3.5
7
3.5
7
10
mA
mA
mA
14
14
POWER CONSUMPTION
220
175
375
220
375
175
220
375
175
220
375
175
220
375
175
mW
4
mW
5
INTERNAL REFERENCE VOLTAGE
Output Current
(Available for External Loads)
(External Load Should Not
Change During the Conversion)
9.9
10.0
10.1
9.9
10.0
10.1
9.9
10.0
10.1
9.9
10.0
10.1
9.9
10.0
10.1
V
2.0
2.0
2.0
2.0
2.0
mA
NOTES
1
Adjustable to zero.
2
Includes internal voltage reference error.
3
Maximum change from 25
°
C value to the value at T
MIN
or T
MAX
.
4
Tested with REF OUT tied to REF IN through 50
resistor, V
CC
= +16.5 V, V
EE
= –16.5 V, V
LOGIC
= +5.5 V, and outputs in high-Z mode.
5
Tested with REF OUT tied to REF IN through 50
resistor, V
CC
= +12 V, V
EE
= –12 V, V
LOGIC
= +5 V, and outputs in high-Z mode.
Specifications subject to change without notice.
Specifications shown in
boldface
are tested on
all
devices at final electrical test at T
MIN
, 25
°
C, and T
MAX
. Results from those tests are used to calculate outgoing quality levels. All min and
max specifications are guaranteed, although only those shown in boldface are tested.
V
LOGIC
= +5 V 10%, V
EE
= –15 V
10% or –12 V 5%, unless otherwise noted.)
(T
MIN
to T
MAX
with V
CC
= +15 V 10% or +12 V 5%,
REV. C
–2–
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