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a
LC
2
MOS, Hgh Speed
1-, 4- & 8-Channel 10-Bit ADCs
AD7776/AD7777/AD7778*
FUNCT IONAL BLOCK DIAGRAMS
CS
RD WR BUSY/INT
AGND
DB0–DB9
AD7776
10
DGND
CLKIN
10
CONTROL
REGISTER
ADCREG1
T/H
REFOUT
REFIN
REF
AGND
C
REFIN
RTN
V
SWING
V
BIAS
A
IN
1
MUX
REFIN
10-BIT
ADC
CONTROL LOGIC
V
CC
AGND
DB0–DB9
AD7777
10
CONTROL
REGISTER
DGND
CLKIN
10
ADCREG2
ADCREG1
T/H
1
REFOUT
REFIN
REF
AGND
C
REFIN
V
SWING
V
BIAS
A
IN
1
A
IN
2
A
IN
3
A
IN
4
MUX
1
REFIN
T/H
2
MUX
2
10-BIT
ADC
CONTROL LOGIC
V
CC
RTN
AGND
DB0–DB9
AD7778
10
CONTROL
REGISTER
DGND
CLKIN
CS
RD WR BUSY/INT
10
ADCREG2
ADCREG1
T/H
1
REFOUT
REFIN
REF
AGND
C
REFIN
V
SWING
V
BIAS
A
IN
1
A
IN
2
A
IN
3
A
IN
4
A
IN
5
A
IN
6
A
IN
7
A
IN
8
MUX
1
REFIN
T/H
2
MUX
2
10-BIT
ADC
CONTROL LOGIC
V
CC
RTN
FEATURES
AD7776: Single Channel
AD7777: 4-Channel
AD7778: 8-Channel
Fast 10-Bit ADC: 2.5
m
s Worst Case
+5 V Only
Half-Scale Conversion Option
Fast Interface Port
Power-Down Mode
APPLICATIONS
HDD Servos
Instrumentation
GE NE RAL DE SCRIPT ION
T he AD7776, AD7777 and AD7778 are a family of high speed,
multichannel, 10-bit ADCs primarily intended for use in R/W
head positioning servos found in high density hard disk drives.
T hey have unique input signal conditioning features that make
them ideal for use in such single supply applications.
By setting a bit in a control register within both the four-channel
version, AD7777, and the eight-channel version, AD7778, the
input channels can either be independently sampled or any two
channels of choice can be simultaneously sampled. For all ver-
sions the specified input signal range is of the form V
BIAS
±
V
SWING
. However, if the RT N pin is biased at, say, 2 V the
analog input signal range becomes 0 V to +2 V for all input
channels. T his is covered in more detail under the section
Changing the Analog Input Voltage Range. T he voltage V
BIAS
is the offset of the ADC’s midpoint code from ground and is
supplied either by an onboard reference available to the user
(REFOUT ) or by an external voltage reference applied to
REFIN. T he full-scale range (FSR) of the ADC is equal to
2 V
SWING
where V
SWING
is nominally equal to REFIN/2. Addi-
tionally, when placed in the half-scale conversion mode, the
value of REFIN is converted. T his allows the channel offset(s)
to be measured.
Control register loading and ADC register reading, channel se-
lect and conversion start are under the control of the
μ
P. T he
twos complemented coded ADCs are easily interfaced to a stan-
dard 16-bit MPU bus via their 10-bit data port and standard
microprocessor control lines.
T he AD7776/AD7777/AD7778 are fabricated in linear compat-
ible CMOS (LC
2
MOS), an advanced, mixed technology process
that combines precision bipolar circuits with low power CMOS
logic. T he AD7776 is available in a 24-pin SOIC package; the
AD7777 is available in both 28-pin DIP and 28-pin SOIC pack-
ages; the AD7778 is available in a 44-pin PQFP package.
*
Protected by U.S. Patent No. 4,990,916.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
Analog Devices, Inc., 1997