- 您現在的位置：買賣IC網 > PDF目錄373916 > AD7778AS (ANALOG DEVICES INC) LC2MOS, High Speed 1-, 4- & 8-Channel 10-Bit ADCs PDF資料下載
參數資料
| 型號： | AD7778AS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS, High Speed 1-, 4- & 8-Channel 10-Bit ADCs |
| 中文描述： | 8-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44 |
| 封裝： | PLASTIC, MS-022AB, QFP-44 |
| 文件頁數： | 7/12頁 |
| 文件大小： | 220K |
| 代理商： | AD7778AS |
AD7776/AD7777/AD7778
–7–
REV. 0
state (as programmed by CR9), and the SAR contents are trans-
ferred to the first register ADCREG1. T he SAR is then reset in
readiness for a new conversion. If simultaneous sampling has
been requested (CR6 = 1), no change occurs in the status of the
BUSY
/
INT
output and the ADC automatically starts the second
conversion. At the end of this conversion the
BUSY
/
INT
line
changes state (as programmed by CR9) and the SAR contents
are transferred to the second register, ADCREG2.
t
D
*
CLKIN
V
IN
WR
CHANNEL ACQUISITION
40ns
TYP
40ns
TYP
'HOLD'
DB9 (MSB)
*
TIMING SHOWN FOR t
D
GREATER THAN 12ns
Figure 6. ADC Conversion Start Timing
T rack-and-Hold
T he track-and-hold (T /H) amplifiers on the analog input(s) of
the AD7776/AD7777/AD7778 allow the ADC to accurately
convert an input sine wave of 2 V peak-peak amplitude up to a
frequency of 189 kHz, the Nyquist frequency of the ADC when
operated at its maximum throughput rate of 378 kHz. T his
maximum rate of conversion includes conversion time and time
between conversions. Because the input bandwidth of the track-
and-hold is much greater than 189 kHz, the input signal should
be band limited to avoid folding unwanted signals into the band
of interest.
Powerdown
T he AD7776/AD7777/AD7778 can be placed in a powerdown
mode simply by writing a logic high to location CR8 of the con-
trol register. T he following changes are effected immediately on
writing a “1” to location CR8:
Any conversion in progress is terminated.
If a conversion is in progress, the leading edge of
WR
immedi-
ately drives the
BUSY
/
INT
output high.
All the linear circuitry is turned off.
T he REFOUT output stops being driven and is weakly (5 k
)
pulled to analog ground.
Control inputs
CS
,
WR
and
RD
retain their purpose while the
AD7776/ AD7777/AD7778 is in powerdown. If no conversions
are in progress when the AD7776/AD7777/AD7778 is placed
into the powerdown modes, the contents of the ADC registers,
ADCREG1 and ADCREG2, are retained during powerdown
and can be read as normal. On returning to normal operating
mode a new conversion (or conversions, dependent on CR6) is
automatically started. On completion, the invalid conversion
results are loaded into the ADC registers losing the previous
valid results.
In order to achieve the lowest possible power consumption in
the powerdown mode special attention must be paid to the state
of the digital and analog inputs and outputs:
Because each analog input channel sees a resistive divider to
AGND, the input resistance of which does not change be-
tween normal and powerdown modes, driving the analog input
signals to 0 V or as close as possible to 0 V will minimize the
power dissipated in the input signal conditioning circuitry.
Similarly, the REFIN input sees a resistive divider to AGND,
the input resistance of which does not change between normal
and powerdown modes. If an external reference is being used,
then driving this reference input to 0 V or as close as possible
to 0 V will minimize the power dissipated in the input signal
conditioning circuitry.
Since the REFOUT pin is pulled to AGND via, typically, a
5 k
resistor, any voltage above 0 V that this output may be
pulled to by external circuitry will dissipate unnecessary
power.
Digital inputs
CS
,
WR
&
RD
should all be held at V
CC
or as
close as possible. CLK IN should be held as close as possible
to either 0 V or V
CC.
Since the
BUSY
/
INT
output is actively driven to a logic high,
any loading on this pin to 0 V will dissipate power.
T he AD7776/AD7777/AD7778 comes out of the powerdown
mode when a Logic “0” is written to location CR8 of the con-
trol register. Note that the contents of the other locations in the
control register are retained when the device is placed in
powerdown and are valid when power is restored. However,
coming out of powerdown provides an opportunity to reload
the complete contents of the control register without any extra
instructions.
相關PDF資料 |
PDF描述 |
|---|---|
| AD7778* | LC2MOS. High Speed 1-. 4- & 8-Channel 10-Bit ADCs |
| AD7782 | Read Only, Pin Configured 24-Bit ADC |
| AD7782BRU | Read Only, Pin Configured 24-Bit ADC |
| AD7783 | Read-Only, Pin Configured 24-Bit ADC with Excitation Current Sources |
| AD7783BRU | Read-Only, Pin Configured 24-Bit ADC with Excitation Current Sources |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7778ASZ | 功能描述:IC ADC 10BIT 8CHAN HS 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
| AD7779ACPZ | 功能描述:24 Bit Analog to Digital Converter 8 Input 8 Sigma-Delta 64-LFCSP (9x9) 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態:有效 位數:24 采樣率（每秒）:16k 輸入數:8 輸入類型:差分，單端 數據接口:串行 配置:PGA-ADC 無線電 - S/H:ADC:- A/D 轉換器數:8 架構:三角積分 參考類型:外部， 內部 電壓 - 電源，模擬:±1.65V，2.2 V ~ 3.6 V 電壓 - 電源，數字:- 特性:同步采樣 工作溫度:-40°C ~ 125°C 封裝/外殼:64-WFQFN 裸露焊盤 供應商器件封裝:64-LFCSP（9x9） 標準包裝:1 |
| AD7779ACPZ-RL | 功能描述:IC ADC 24BIT 16KSPS 制造商:analog devices inc. 系列:* 零件狀態:有效 標準包裝:2,500 |
| AD7780 | 制造商:AD 制造商全稱:Analog Devices 功能描述:24-Bit, Pin-Programmable, Ultralow Power Sigma-Delta ADC |
| AD7780BRUZ | 功能描述:IC ADC 24BIT 1CH LP SD 16TSSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
發布緊急采購，3分鐘左右您將得到回復。