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參數資料
| 型號： | AD7845BR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | LC2MOS Complete 12-Bit Multiplying DAC |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 2.5 us SETTLING TIME, 12-BIT DAC, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數： | 3/12頁 |
| 文件大小： | 193K |
| 代理商： | AD7845BR |
AD7845
REV. B
–3–
Limit at T
MIN
to T
MAX
(All Versions)
Parameter
Units
Test Conditions/Comments
t
CS
t
CH
t
WR
t
DS
t
DH
30
0
30
80
0
ns min
ns min
ns min
ns min
ns min
Chip Select to Write Setup Time
Chip Select to Write Hold Time
Write Pulsewidth
Data Setup Time
Data Hold Time
NOTES
1
Guaranteed by design and characterization, not production tested.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
°
C unless otherwise stated)
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +17 V
V
SS
to DGND . . . . . . . . . . . . . . . . . . . . . . . .+0.3 V to –17 V
V
REF
to AGND . . . . . . . . . . . . . . . .V
DD
+ 0.3 V, V
SS
– 0.3 V
V
RFB
to AGND . . . . . . . . . . . . . . . .V
DD
+ 0.3 V, V
SS
– 0.3 V
V
RA
to AGND . . . . . . . . . . . . . . . . .V
DD
+ 0.3 V, V
SS
– 0.3 V
V
RB
to AGND . . . . . . . . . . . . . . . . .V
DD
+ 0.3 V, V
SS
– 0.3 V
V
RC
to AGND . . . . . . . . . . . . . . . . .V
DD
+ 0.3 V, V
SS
– 0.3 V
V
OUT
to AGND
2
. . . . . . . . . . . . . . .V
DD
+ 0.3 V, V
SS
– 0.3 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
Digital Input Voltage to DGND . . . . . –0.3 V to V
DD
+ 0.3 V
Power Dissipation (Any Package)
To +75
°
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW
Derates above +75
°
C . . . . . . . . . . . . . . . . . . . . . 10 mW/
°
C
TIMING CHARACTERISTICS
1
(V
DD
= +15 V,
6
5%. V
SS
= –15 V,
6
5%. V
REF
= +10 V. AGND = DGND = O V.)
ORDERING GUIDE
1
Relative
Accuracy
@ +25
8
C
±
1 LSB
±
1/2 LSB
±
1 LSB
±
1/2 LSB
±
1 LSB
±
1/2 LSB
±
1 LSB
±
1/2 LSB
±
1 LSB
±
1/2 LSB
±
1 LSB
±
1/2 LSB
±
1 LSB
Temperature
Range
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
Package
Option
3
Model
2
AD7845JN
AD7845KN
AD7845JP
AD7845KP
AD7845JR
AD7845KR
AD7845AQ
AD7845BQ
AD7845AR
AD7845BR
AD7845SQ/883B
AD7845TQ/883B
AD7845SE/883B
N-24
N-24
P-28A
P-28A
R-24
R-24
Q-24
Q-24
R-24
R-24
Q-24
Q-24
E-28A
NOTES
1
Analog Devices reserves the right to ship either ceramic (D-24A) or cerdip
(Q-24) hermetic packages.
2
To order MIL-STD-883, Class B processed parts, add /883B to part number.
3
E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip; R = SOIC.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7845 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Operating Temperature Range
Commercial (J, K Versions) . . . . . . . . . . . . . 0
°
C to +70
°
C
Industrial (A, B Versions) . . . . . . . . . . . . –40
°
C to +85
°
C
Extended (S, T Versions) . . . . . . . . . . . . –55
°
C to +125
°
C
Storage Temperature Range . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +300
°
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect device
reliability. Only one Absolute Maximum Rating may be applied at any one time.
2
V
may be shorted to AGND provided that the power dissipation of the
package is not exceeded.
CS
WR
DATA
5V
0V
5V
0V
5V
0V
NOTES
1. ALL INPUT SIGNAL RISE AND FALL TIMES MEASURED FROM
10% TO 90% OF +5V. t
= t
= 20ns.
2. TIMING MEASUREMENT REFERENCE LEVEL IS
V
IH
+ V
IL
2
t
CS
t
CH
t
WR
t
DS
t
DH
Figure 1. AD7845 Timing Diagram
WARNING!
ESD SENSITIVE DEVICE
相關PDF資料 |
PDF描述 |
|---|---|
| AD7845JN | LC2MOS Complete 12-Bit Multiplying DAC |
| AD7845JP | LC2MOS Complete 12-Bit Multiplying DAC |
| AD7845JR | LC2MOS Complete 12-Bit Multiplying DAC |
| AD7845KN | LC2MOS Complete 12-Bit Multiplying DAC |
| AD7845KP | LC2MOS Complete 12-Bit Multiplying DAC |
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