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參數(shù)資料
| 型號(hào)： | AD7851KN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit 333 kSPS Serial A/D Converter |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, MO-095AG, DIP-24 |
| 文件頁數(shù)： | 15/36頁 |
| 文件大小： | 435K |
| 代理商： | AD7851KN |
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–15–
REV. A
AD7851
ANALOG INPUT
T he equivalent circuit of the analog input section is shown in
Figure 11. During the acquisition interval the switches are
both in the track position and the AIN(+) charges the 20 pF
capacitor through the 125
resistance. On the rising edge of
CONVST
switches SW1 and SW2 go into the hold position
retaining charge on the 20 pF capacitor as a sample of the signal
on AIN(+). T he AIN(–) is connected to the 20 pF capacitor,
and this unbalances the voltage at node A at the input of the
comparator. T he capacitor DAC adjusts during the remainder of
the conversion cycle to restore the voltage at node A to the cor-
rect value. T his action transfers a charge, representing the analog
input signal, to the capacitor DAC which in turn forms a digital
representation of the analog input signal. T he voltage on the
AIN(–) pin directly influences the charge transferred to the
capacitor DAC at the hold instant. If this voltage changes during
the conversion period, the DAC representation of the analog
input voltage will be altered. T herefore it is most important that
the voltage on the AIN(–) pin remains constant during the con-
version period. Furthermore, it is recommended that the AIN(–)
pin is always connected to AGND or to a fixed dc voltage.
CAPACITOR
DAC
COMPARATOR
HOLD
TRACK
SW2
NODE A
20pF
SW1
TRACK
HOLD
125
125
AIN(+)
AIN(–)
C
REF2
Figure 11. Analog Input Equivalent Circuit
Acquisition T ime
T he track and hold amplifier enters its tracking mode on the fall-
ing edge of the BUSY signal. T he time required for the track and
hold amplifier to acquire an input signal will depend on how
quickly the 20 pF input capacitance is charged. T he acquisition
time is calculated using the formula:
t
ACQ
= 9
×
(R
IN
+ 125
)
×
20
pF
where
R
IN
is the source impedance of the input signal, and
125
, 20
pF
is the input R, C.
DC/AC Applications
For dc applications high source impedances are acceptable, pro-
vided there is enough acquisition time between conversions to
charge the 20 pF capacitor. T he acquisition time can be calcu-
lated from the above formula for different source impedances.
For example with R
IN
= 5 k
, the required acquisition time will
be 922 ns.
For ac applications, removing high frequency components from
the analog input signal is recommended by use of an RC low-
pass filter on the AIN(+) pin, as shown in Figure 13. In applica-
tions where harmonic distortion and signal to noise ratio are
critical, the analog input should be driven from a low impedance
source. Large source impedances will significantly affect the ac
performance of the ADC. T his may necessitate the use of an in-
put buffer amplifier. T he choice of the op amp will be a function
of the particular application.
When no amplifier is used to drive the analog input the source
impedance should be limited to low values. T he maximum
source impedance will depend on the amount of total harmonic
distortion (T HD) that can be tolerated. T he T HD will increase
as the source impedance increases and performance will degrade.
Figure 12 shows a graph of the total harmonic distortion vs.
analog input signal frequency for different source impedances.
With the setup as in Figure 13, the T HD is at the –90 dB level.
With a source impedance of 1 k
and no capacitor on the
AIN(+) pin, the T HD increases with frequency.
T
INPUT FREQUENCY – kHz
–50
–60
–110
–100
–80
–90
–70
1
166
10
20
50
80
THD VS. FREQUENCY FOR DIFFERENT
SOURCE IMPEDANCES
R
IN
= 560
R
IN
= 10
, 10nF
AS IN FIGURE 13
140
120
100
Figure 12. THD vs. Analog Input Frequency
In a single supply application (5 V), the V+ and V– of the op
amp can be taken directly from the supplies to the AD7851
which eliminates the need for extra external power supplies.
When operating with rail-to-rail inputs and outputs at frequen-
cies greater than 10 kHz, care must be taken in selecting the
particular op amp for the application. In particular, for single
supply applications the input amplifiers should be connected in
a gain of –1 arrangement to get the optimum performance. Fig-
ure 13 shows the arrangement for a single supply application
with a 10
and 10 nF low-pass filter (cutoff frequency 320
kHz) on the AIN(+) pin. Note that the 10 nF is a capacitor with
good linearity to ensure good ac performance. Recommended
single supply op amp is the AD820.
IC1
+5V
10k
10k
10k
V+
V–
10k
10
AD820
V
IN
–V
REF
/2 TO +V
REF
/2
V
REF
/2
10μF
0.1μF
10nF
(NPO)
TO AIN(+) OF
AD7851
Figure 13. Analog Input Buffering
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| AD7851KR | 14-Bit 333 kSPS Serial A/D Converter |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7851KNZ | 功能描述:IC ADC 14BIT SRL 333KSPS 24-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7851KR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD7851KR-REEL | 制造商:Analog Devices 功能描述: |
| AD7851KRZ | 功能描述:IC ADC 14BIT SRL 333KSPS 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7851KRZ3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit 333 kSPS Serial A/D Converter |
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