
AD7851
–6–
REV. A
ABSOLUT E MAX IMUM RAT INGS
1
(T
A
= +25
°
C unless otherwise noted)
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AV
DD
to DV
DD
. . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Analog Input Voltage to AGND . . . . –0.3 V to AV
DD
+ 0.3 V
Digital Input Voltage to DGND . . . . –0.3 V to DV
DD
+ 0.3 V
Digital Output Voltage to DGND . . . –0.3 V to DV
DD
+ 0.3 V
REF
IN
/REF
OUT
to AGND . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
Input Current to Any Pin Except Supplies
2
. . . . . . . .
±
10 mA
Operating T emperature Range
Commercial (A, K Versions) . . . . . . . . . . –40
°
C to +125
°
C
Storage T emperature Range . . . . . . . . . . . –65
°
C to +150
°
C
Junction T emperature . . . . . . . . . . . . . . . . . . . . . . . . . +150
°
C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
θ
JA
T hermal Impedance . . . . . . . . . . . . . . . . . . . . 105
°
C/W
θ
JC
T hermal Impedance . . . . . . . . . . . . . . . . . . . . 34.7
°
C/W
Lead T emperature, (Soldering, 10 secs) . . . . . . . . . . +260
°
C
SOIC, SSOP Package, Power Dissipation . . . . . . . . . 450 mW
θ
JA
T hermal Impedance . . . 75
°
C/W (SOIC) 115
°
C/W (SSOP)
θ
JC
T hermal Impedance . . . . 25
°
C/W (SOIC) 35
°
C/W (SSOP)
Lead T emperature, Soldering
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . +215
°
C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . +220
°
C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >1.5 kV
NOT ES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
T ransient currents of up to 100 mA will not cause SCR latch-up.
PINOUT FOR DIP, SOIC AND SSOP
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
AD7851
TOP VIEW
(Not to Scale)
CONVST
BUSY
SLEEP
REF
IN
/REF
OUT
AV
DD
AGND
C
REF1
C
REF2
AIN(+)
AIN(–)
NC
AGND
SYNC
SCLK
CLKIN
DIN
DOUT
DGND
DV
DD
CAL
SM2
SM1
POLARITY
AMODE
ORDE RING GUIDE
1
Linearity
E rror
(LSB)
2
T emp
Range
T hroughput
Rate
T hroughput
@ +125
8
C
Package
Options
3
Model
AD7851AN
AD7851K N
AD7851AR
AD7851K R
AD7851ARS
EVAL-AD7851CB
4
EVAL-CONT ROL BOARD
5
–40
°
C to +85
°
C
0
°
C to +85
°
C
–40
°
C to +85
°
C
0
°
C to +85
°
C
–40
°
C to +85
°
C
±
2
±
1
±
2
±
1
±
2
333 kSPS
285 kSPS
333 kSPS
285 kSPS
333 kSPS
238 kSPS
238 kSPS
238 kSPS
238 kSPS
238 kSPS
N-24
N-24
R-24
R-24
RS-24
NOT ES
1
Both A and K Grades are guaranteed up to 125
°
C, but at a lower throughput of 238 kHz (5 MHz).
.
2
Linearity error refers to the integral linearity error.
3
N = Plastic DIP; R = SOIC; RS = SSOP.
4
T his can be used as a stand-alone evaluation board or in conjunction with the EVAL-CONT ROL BOARD for evaluation/demonstration
purposes.
5
T his board is a complete unit allowing a PC to control and communicate with all Analog Devices, Inc. evaluation boards ending in the
CB designators.