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參數資料
| 型號： | AD7863ARS-2 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Simultaneous Sampling Dual 175 kSPS 14-Bit ADC |
| 中文描述： | 4-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | MO-150AH, SSOP-28 |
| 文件頁數： | 11/18頁 |
| 文件大?。?/td> | 207K |
| 代理商： | AD7863ARS-2 |
AD7863
–
11
–
REV. A
CS
RD
DATA
V
A1
V
A2
A0
Figure 5d. Read Option C
OPERATING MODES
Mode 1 Operation (Normal Power, High Sampling
Performance)
The timing diagram in Figure 5a is for optimum performance in
operating Mode 1 where the falling edge of
CONVST
starts
conversion and puts the track/hold amplifiers into their hold
mode. This falling edge of
CONVST
also causes the BUSY
signal to go high to indicate that a conversion is taking place.
The BUSY signal goes low when the conversion is complete,
which is 5.2
μ
s max after the falling edge of
CONVST
and new
data from this conversion is available in the output latch of the
AD7863. A read operation accesses this data. If the multiplexer
select A0 is low, the first and second read pulses after the first
conversion accesses the result from Channel A (V
A1
and V
A2
respectively). The third and fourth read pulses, after the second
conversion and A0 high, access the result from Channel B (V
B1
and V
B2
, respectively). Data is read from the part via a 14-bit
parallel data bus with standard
CS
and
RD
signals. This data
read operation consists of a negative going pulse on the
CS
pin
combined with two negative going pulses on the
RD
pin (while
the
CS
is low), accessing the two 14-bit results. For the fastest
throughput rate the read operation will take 100 ns. The read
operation must be complete at least 400 ns before the falling
edge of the next
CONVST
and this gives a total time of 5.7
μ
s
for the full throughput time (equivalent to 175 kHz). This mode of
operation should be used for high sampling applications.
Mode 2 Operation (Power-Down, Auto-Sleep After
Conversion)
The timing diagram in Figure 6 is for optimum performance in
operating Mode 2 where the part automatically goes into sleep
mode once BUSY goes low after conversion and
“
wakes up
”
before the next conversion takes place. This is achieved by keep-
ing
CONVST
low at the end of the second conversion, whereas
it was high at the end of the second conversion for Mode 1
operation.
The operation shown in Figure 6 shows how to access data from
both Channels A and B, followed by the Auto Sleep mode. One
can also set up the timing to access data from Channel A only or
Channel B only (see Read Options section) and then go into
Auto-Sleep mode. The rising edge of
CONVST
“
wakes up
”
the
part. This wake-up time is 4.8
μ
s when using an external refer-
ence and 5 ms when using the internal reference, at which point
the track/hold amplifiers go into their hold mode provided the
CONVST
has gone low. The conversion takes 5.2
μ
s after this
giving a total of 10
μ
s (external reference, 5.005 ms for internal
reference) from the rising edge of CONVST to the conversion
being complete, which is indicated by the BUSY going low.
Note that since the wake-up time from the rising edge of
CONVST
is 4.8
μ
s, if the
CONVST
pulsewidth is greater than 5.2
μ
s the
conversion will take more than the 10
μ
s (4.8
μ
s wake-up time
+5.2
μ
s conversion time) shown in Figure 6 from the rising edge
of
CONVST
. This is because the track/hold amplifiers go into
their hold mode on the falling edge of
CONVST
and the con-
version will not be complete for a further 5.2
μ
s. In this case, the
BUSY will be the best indicator of when the conversion is com-
plete. Even though the part is in sleep mode, data can still be
read from the part.
The read operation is identical to that in Mode 1 operation and
must also be complete at least 400 ns before the falling edge of
the next
CONVST
to allow the track/hold amplifiers to have
enough time to settle. This mode is very useful when the part is
converting at a slow rate as the power consumption will be
significantly reduced from that of Mode 1 operation.
t
3
t
CONV
= 5.2 s
V
A1
V
A2
V
B1
V
B2
CONVST
BUSY
A0
CS
RD
DATA
t
3
4.8 s*/5ms**
WAKE-UP TIME
t
CONV
= 5.2 s
* WHEN USING AN EXTERNAL REFERENCE, WAKE-UP TIME = 4.8 s
** WHEN USING AN INTERNAL REFERENCE, WAKE-UP TIME = 5ms
t
ACQ
t
8
Figure 6. Mode 2 Timing Diagram Where Automatic Sleep Function Is Initiated
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