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參數(shù)資料
| 型號： | AD7887AR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | +2.7 V to +5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead uSOIC |
| 中文描述： | 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | 0.150 INCH, MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 133K |
| 代理商： | AD7887AR |
REV. B
AD7887
–9–
When the ADC starts a conversion (see Figure 6), SW2 will
open and SW1 will move to Position B causing the comparator
to become unbalanced. T he control logic and the charge redis-
tribution DAC are used to add and subtract fixed amounts of
charge from the sampling capacitor to bring the comparator
back into a balanced condition. When the comparator is rebal-
anced the conversion is complete. T he control logic generates
the ADC output code. Figure 7 shows the ADC transfer function.
CONVERSION
PHASE
REF IN/REF OUT/2
SAMPLING
CAPACITOR
COMPARATOR
CONTROL
LOGIC
SW1
A
SW2
AGND
B
V
IN
CHARGE
REDISTRIBUTION
DAC
Figure 6. ADC Conversion Phase
ADC T RANSFE R FUNCT ION
T he output coding of the AD7887 is straight binary. T he de-
signed code transitions occur at successive integer LSB values
(i.e., 1 LSB, 2 LSBs, etc.). T he LSB size is = V
REF
/4096. T he
ideal transfer characteristic for the AD7887 is shown in Figure 7.
0V
A
ANALOG INPUT
111...000
011...111
0.5LSB
+V
REF
– 1.5LSB
1LSB = V
REF
/4096
111...111
111...110
000...010
000...001
000...000
Figure 7. Transfer Characteristic
T Y PICAL CONNE CT ION DIAGRAM
Figure 8 shows a typical connection diagram for the AD7887.
T he GND pin is connected to the analog ground plane of the
system. T he part is in dual-channel mode so V
REF
is internally
connected to a well decoupled V
DD
pin to provide an analog
input range of 0 V to V
DD
. T he conversion result is output in a
16-bit word with four leading zeros followed by the MSB of the
12-bit result. For applications where power consumption is of
concern, the automatic power-down at the end of conversion
should be used to improve power performance. See Modes of
Operation section of the data sheet.
DOUT
DIN
SCLK
CS
AIN1
AIN2
GND
0.1
m
F
10
m
F
SUPPLY +2.7V
TO +5.25V
SERIAL
INTERFACE
V
DD
AD7887
0V TO V
DD
INPUT
m
C/
m
P
Figure 8. Typical Connection Diagram
Analog Input
Figure 9 shows an equivalent circuit of the analog input structure
of the AD7887. T he two diodes D1 and D2 provide ESD pro-
tection for the analog inputs. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 200 mV. T his will cause these diodes to become forward
biased and start conducting current into the substrate. 20 mA is
the maximum current these diodes can conduct without causing
irreversible damage to the part. However, it is worth noting that
a small amount of current (1 mA) being conducted into the
substrate due to an overvoltage on an unselected channel can
cause inaccurate conversions on a selected channel. T he capaci-
tor C1 in Figure 9 is typically about 4 pF and can primarily be
attributed to pin capacitance. T he resistor R1 is a lumped
component made up of the on resistance of a multiplexer and a
switch. T his resistor is typically about 100
. T he capacitor C2
is the ADC sampling capacitor and typically has a capacitance
of 20 pF.
Note: T he analog input capacitance seen when in track mode is
typically 38 pF while in hold mode it is typically 4 pF.
V
IN
V
DD
D2
R1
C1
4pF
CONVERSION PHASE – SWITCH OPEN
TRACK PHASE – SWITCH CLOSED
D1
C2
20pF
Figure 9. Equivalent Analog Input Circuit
For ac applications, removing high frequency components from
the analog input signal is recommended by use of an RC low-
pass filter on the relevant analog input pin. In applications
where harmonic distortion and signal to noise ratio are critical,
the analog input should be driven from a low impedance source.
Large source impedances will significantly affect the ac perfor-
mance of the ADC. T his may necessitate the use of an input
buffer amplifier. T he choice of the op amp will be a function of
the particular application.
When no amplifier is used to drive the analog input the source
impedance should be limited to low values. T he maximum
source impedance will depend on the amount of total harmonic
distortion (T HD) that can be tolerated. T he T HD will increase
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| AD7887ARM | +2.7 V to +5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead uSOIC |
| AD7887BR | +2.7 V to +5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead uSOIC |
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD7887ARM | 功能描述:IC ADC 12BIT 2CH SRL 8-MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7887ARM-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 125ksps 12-bit Serial 8-Pin MSOP T/R |
| AD7887ARM-REEL7 | 功能描述:IC ADC 12BIT 2CH SRL 8-MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7887ARMZ | 功能描述:IC ADC 12BIT 2CH SRL 8MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7887ARMZ | 制造商:Analog Devices 功能描述:IC ADC 12BIT 125KSPS MSOP-8 |
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