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參數(shù)資料
型號: AD7888ARU
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: +2.7 V to +5.25 V, Micropower, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Lead TSSOP
中文描述: 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16
封裝: TSSOP-16
文件頁數(shù): 7/16頁
文件大小: 164K
代理商: AD7888ARU
REV. 0
AD7888
–7–
CONTROL REGISTER
The Control Register on the AD7888 is an 8-bit, write-only register. Data is loaded from the DIN pin of the AD7888 on the rising
edge of SCLK. The data is transferred on the DIN line at the same time as the conversion result is read from the part. This requires
16 serial clocks for every data transfer. Only the information provided on the first 8 rising clock edges (after
CS
falling edge) is loaded
to the Control Register. MSB denotes the first bit in the data stream. The bit functions are outlined in Table I. The default contents
of the Control Register on power-up is all zeros.
Table I. Control Register Bit Function Description
MSB
C
T
N
O
D
O
R
E
Z
2
D
D
A
1
D
D
A
0
D
D
A
F
E
R
1
M
P
0
M
P
Bit
7
Mnemonic
DONTC
Comment
Don’t Care. The value written to this bit of the Control Register is a don’t care, i.e., it doesn’t matter if the bit is
0 or 1.
A zero must be written to this bit to ensure correct operation of the AD7888.
These three address bits are loaded at the end of the present conversion sequence and select which analog input
channel is converted for the next conversion. The selected input channel is decoded as shown in Table II.
6
5
4
3
2
ZERO
ADD2
ADD1
ADD0
REF
Reference Bit. With a 0 in this bit, the on-chip reference is enabled. With a 1 in this bit, the on-chip reference
is disabled. To obtain best performance from the AD7888, the internal reference should be disabled when
using an externally applied reference source. (See On-Chip Reference section.)
Power Management Bits. These two bits decode the mode of operation of the AD7888 as shown in Table III.
1, 0
PM1, PM0
PERFORMANCE CURVES
Figure 2 shows a typical FFT plot for the AD7888 at 100 kHz
sample rate and 10 kHz input frequency.
FREQUENCY – kHz
–10
0
48.83
d
12.21
24.41
36.62
–30
–50
–70
–90
–110
4096 POINT FFT
SAMPLING
100kSPS
f
= 10kHz
SNR = 70dB
Figure 2. Dynamic Performance
Figure 3 shows a typical plot for the SNR vs. frequency for a
5 V supply and with a 5 V external reference.
INPUT FREQUENCY – kHz
71.00
42.14
S
73.0
72.5
72.0
71.5
10.89
31.59
V
DD
= +5V
5V EXT REFERENCE
21.14
Figure 3. SNR vs. Input Frequency
相關(guān)PDF資料
PDF描述
AD7888BR +2.7 V to +5.25 V, Micropower, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Lead TSSOP
AD7888BRU +2.7 V to +5.25 V, Micropower, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Lead TSSOP
AD7889 12-Bit 600 kSPS ADC(單電源600kSPS12位A/D轉(zhuǎn)換器)
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