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參數(shù)資料
型號(hào): AD7892BN
廠商: ANALOG DEVICES INC
元件分類(lèi): ADC
英文描述: LC 2 MOS Single Supply 12-Bit 600 kSPS ADC(144.58 k)
中文描述: 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PDIP24
封裝: 0.300 INCH, PLASTIC, DIP-24
文件頁(yè)數(shù): 8/14頁(yè)
文件大小: 144K
代理商: AD7892BN
AD7892
–8–
REV. C
Relative Accuracy
Relative accuracy or endpoint nonlinearity is the maximum
deviation from a straight line passing through the endpoints of
the ADC transfer function.
Differential Nonlinearity
This is the difference between the measured and the ideal
1 LSB change between any two adjacent codes in the ADC.
Positive Full-Scale Error (AD7892-1)
This is the deviation of the last code transition (01 . . . 110 to
01 . . . 111) from the ideal 4
×
REF IN – 3/2 LSB (
±
10 V range)
or 2
×
REF IN – 3/2 LSB (
±
5 V range) after the bipolar zero
error has been adjusted out.
Positive Full-Scale Error (AD7892-2)
This is the deviation of the last code transition (11 . . . 110 to
11 . . . 111) from the ideal (REF IN – 3/2 LSB) after the unipo-
lar offset error has been adjusted out.
Positive Full-Scale Error (AD7892-3)
This is the deviation of the last code transition (01 . . . 110 to
01 . . . 111) from the ideal (REF IN – 3/2 LSB) after the bipolar
zero error has been adjusted out.
Bipolar Zero Error (AD7892-1, AD7892-3)
This is the deviation of the midscale transition (all 1s to all 0s)
from the ideal (AGND – 1/2 LSB).
Unipolar Offset Error (AD7892-2)
This is the deviation of the first code transition (00 . . . 000 to
00 . . . 001) from the ideal (AGND + 1/2 LSB).
Negative Full-Scale Error (AD7892-1)
This is the deviation of the first code transition (10 . . . 000 to
10 . . . 001) from the ideal –4
×
REF IN + 1/2 LSB (
±
10 V
range) or –2
×
REF IN + 1/2 LSB (
±
5 V range) after bipolar
zero error has been adjusted out.
Negative Full-Scale Error (AD7892-3)
This is the deviation of the first code transition (10 . . . 000 to
10 . . . 001) from the ideal – REF IN + 1/2 LSB after bipolar
zero error has been adjusted out.
Track/Hold Acquisition Time
Track/Hold acquisition time is the time required for the output
of the track/hold amplifier to reach its final value, within
±
1/2 LSB,
after the end of conversion (the point at which the track/hold
returns to track mode). It also applies to situations where there
is a step input change on the input voltage applied to the V
IN
input of the AD7892. It means that the user must wait for the
duration of the track/hold acquisition time after the end of con-
version or after a step input change to V
IN
before starting another
conversion, to ensure that the part operates to specification.
TERMINOLOGY
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (f
S
/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the quan-
tization noise. The theoretical signal to (noise + distortion)
ratio for an ideal N-bit converter with a sine wave input is given
by:
Signal to
(
Noise + Distortion
)
=
(6.02
N +
1.76)
dB
Thus for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7892, it is defined
as:
THD
(
dB
)
=
20 log
V
2
2
+
V
3
2
+
V
4
V
1
2
+
V
5
2
+
V
6
2
where
V
1
is the rms amplitude of the fundamental and
V
2
,
V
3
,
V
4
,
V
5
and
V
6
are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
S
/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is deter-
mined by the largest harmonic in the spectrum, but for parts
where the harmonics are buried in the noise floor, it will be a
noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
±
nfb where
m
,
n
= 0, 1, 2, 3, etc. Intermodulation terms are those for
which neither
m
nor
n
are equal to zero. For example, the sec-
ond order terms include (fa + fb) and (fa – fb), while the third
order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and
(fa – 2fb).
The AD7892 is tested using two input frequencies away from
the bottom end of the input bandwidth. In this case, the second
and third order terms are of different significance. The second
order terms are usually distanced in frequency from the original
sine waves while the third order terms are usually at a frequency
close to the input frequencies. As a result, the second and third
order terms are specified separately. The calculation of the
intermodulation distortion is as per the THD specification where it
is the ratio of the rms sum of the individual distortion products to
the rms amplitude of the fundamental expressed in dBs.
相關(guān)PDF資料
PDF描述
AD7892BR Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators
AD7892SQ Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators
AD7892AN-1 LC2MOS Single Supply, 12-Bit 600 kSPS ADC
AD7892AN-2 LC2MOS Single Supply, 12-Bit 600 kSPS ADC
AD7892AN-3 LC2MOS Single Supply, 12-Bit 600 kSPS ADC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7892BN-1 功能描述:IC ADC 12BIT LP 500KSPS 24-DIP RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率(每秒):83k 數(shù)據(jù)接口:串行,并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散(最大):95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:28-DIP(0.600",15.24mm) 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類(lèi)型:1 個(gè)單端,雙極
AD7892BN-2 制造商:Analog Devices 功能描述:ADC Single SAR 500ksps 12-bit Parallel/Serial 24-Pin PDIP 制造商:Rochester Electronics LLC 功能描述:12-BIT 500 KSPS PARALLEL ADC I.C. - Bulk
AD7892BN-3 制造商:Analog Devices 功能描述:ADC Single SAR 600ksps 12-bit Parallel/Serial 24-Pin PDIP 制造商:Rochester Electronics LLC 功能描述:12-BIT 600 KSPS ADC I.C. - Bulk
AD7892BNZ-1 功能描述:IC ADC 12BIT LP 500KSPS 24-DIP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率(每秒):20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散(最大):155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP(7x7) 包裝:Digi-Reel® 輸入數(shù)目和類(lèi)型:4 個(gè)單端,單極;2 個(gè)差分,單極 產(chǎn)品目錄頁(yè)面:1156 (CN2011-ZH PDF) 其它名稱(chēng):497-5435-6
AD7892BNZ-2 功能描述:IC ADC 12BIT LP 500KSPS 24DIP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率(每秒):83k 數(shù)據(jù)接口:串行,并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散(最大):95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:28-DIP(0.600",15.24mm) 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類(lèi)型:1 個(gè)單端,雙極
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