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參數資料
| 型號： | AD790SQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Fast, Precision Comparator |
| 中文描述： | COMPARATOR, 1500 uV OFFSET-MAX, 60 ns RESPONSE TIME, CDIP8 |
| 封裝： | HERMETIC SEALED, CERDIP-8 |
| 文件頁數： | 2/8頁 |
| 文件大小： | 211K |
| 代理商： | AD790SQ |
REV. B
–2–
AD790–SPECIFICATIONS
DUAL SUPPLY
(Operation @ +25
8
C and +V
S
= +15 V, –V
S
= –15 V, V
LOGIC
= +5 V unless otherwse noted)
AD790J/A
T yp
AD790K/B
T yp
AD790S
T yp
Parameter
Conditions
Min
Max
Min
Max
Min
Max
Units
RESPONSE CHARACT ERIST IC
Propagation Delay, t
PD
100 mV Step
5 mV Overdrive
T
MIN
to T
MAX
40
45
45/50
40
45
45/50
40
45
60
ns
ns
OUT PUT CHARACT ERIST ICS
Output HIGH Voltage, V
OH
1.6 mA Source
6.4 mA Source
T
MIN
to T
MAX
1.6 mA Sink
6.4 mA Sink
T
MIN
to T
MAX
4.65
4.45
4.65
4.45
4.65
4.45
4.3
4.3/
4.3
4.3
4.3
4.3
4.3
V
V
V
V
V
Output LOW Voltage, V
OL
0.35
0.44
0.35
0.44
0.35
0.44
0.5
0.5/
0.5
0.5
0.5
0.5
0.5
INPUT CHARACT ERIST ICS
Offset Voltage
1
0.2
1.0
1.5
0.6
5
6.5
0.25
0.3
0.05
0.25
0.5
0.5
3.5
4.5
0.15
0.2
0.2
1.0
1.5
0.65
5
7
0.25
0.4
mV
mV
mV
μ
A
μ
A
μ
A
μ
A
T
MIN
to T
MAX
T
MIN
to T
MAX
Either Input
T
MIN
to T
MAX
Hysteresis
2
Bias Current
0.3
0.4
2.5
0.3
0.4
1.8
0.3
0.4
2.5
Offset Current
0.04
0.02
0.04
T
MIN
to T
MAX
Power Supply
Rejection Ratio DC
V
S
±
20%
T
MIN
to T
MAX
80
76
90
88
88
85
100
93
80
76
90
85
dB
dB
Input Voltage Range
Differential Voltage
Common Mode
Common Mode
Rejection Ratio
V
S
≤±
15 V
6
V
S
+V
S
–2 V
6
V
S
+V
S
–2 V
6
V
S
+V
S
–2 V V
V
–V
S
–V
S
–V
S
–10 V<V
CM
<+10 V
T
MIN
to T
MAX
80
95
88
105
80
95
dB
76
90
20
i
2
85
100
20
i
2
76
88
20
i
2
dB
M
i
pF
Input Impedance
LAT CH CHARACT ERIST ICS
Latch Hold T ime, t
H
Latch Setup T ime, t
S
LOW Input Level, V
IL
HIGH Input Level, V
IH
Latch Input Current
25
5
35
10
0.8
25
5
35
10
0.8
25
5
35
10
0.8
ns
ns
V
V
μ
A
μ
A
T
MIN
to T
MAX
T
MIN
to T
MA X
1.6
1.6
1.6
2.3
5
7
2.3
3.5
5
2.3
5
8
T
MIN
to T
MAX
SUPPLY CHARACT ERIST ICS
Diff Supply Voltage
3
V
LOGIC
= 5 V
T
MIN
to T
MAX
T
MIN
to T
MAX
4.5
4.0
33
7
4.5
4.0
33
7
4.7
4.2
33
7
V
V
Logic Supply
Quiescent Current
+V
S
–V
S
V
LOGIC
Power Dissipation
+V
S
= 15 V
–V
S
= –15 V
V
LOGIC
= 5 V
8
4
2
10
5
3.3
242
8
4
2
10
5
3.3
242
8
4
2
10
5
3.3
242
mA
mA
mA
mW
T EMPERAT URE RANGE
Rated Performance
T
MIN
to T
MAX
0 to +70/–40 to +85
0 to +70/–40 to +85
–55 to +125
°
C
NOT ES
1
Defined as the average of the input voltages at the low to high and high to low transition points. Refer to Figure 14.
2
Defined as half the magnitude between the input voltages at the low to high and high to low transition points. Refer to Figure 14.
3
+V
S
must be no lower than (V
LOGIC
–0.5 V) in any supply operating conditions, except during power up.
All min and max specifications are guaranteed. Specifications shown in
boldface
are tested on all production units at final test.
Specifications subject to change without notice.
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