- 您現在的位置：買賣IC網 > PDF目錄373926 > AD7912 (Analog Devices, Inc.) 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs PDF資料下載
參數資料
| 型號： | AD7912 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs |
| 中文描述： | 2通道，2.35 V至5.25 V，1 MSPS的，10-/12-Bit模數轉換器 |
| 文件頁數： | 26/32頁 |
| 文件大?。?/td> | 386K |
| 代理商： | AD7912 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當前第26頁第27頁第28頁第29頁第30頁第31頁第32頁
AD7912/AD7922
MICROPROCESSOR INTERFACING
The serial interface on the AD7912/AD7922 allows the parts to
be directly connected to a range of microprocessors. This
section explains how to interface the AD7912/AD7922 with
some of the more common microcontroller and DSP serial
interface protocols.
AD7912/AD7922 to TMS320C541 Interface
The serial interface on the TMS320C541 uses a continuous
serial clock and frame synchronization signals to synchronize
the data transfer operations with peripheral devices like the
AD7912/AD7922. The CS input allows easy interfacing between
the TMS320C541 and the AD7912/AD7922 without any glue
logic required. The serial port of the TMS320C541 is set up to
operate in burst mode (FSM = 1 in the serial port control
register, SPC) with the internal serial clock CLKX (MCM = 1 in
the SPC register) and the internal frame signal (TXM = 1 in the
SPC register); therefore, both pins are configured as outputs. For
the AD7922, the word length should be set to 16 bits (FO = 0 in
the SPC register). This DSP allows frames with a word length of
16 bits or 8 bits only. In the AD7912, therefore, where 14 bits are
required, the FO bit should be set up to 16 bits, and 16 SCLKs
are needed. For the AD7912, two trailing zeros are clocked out
in the last two clock cycles.
Rev. 0 | Page 26 of 32
The values in the SPC register are as follows:
FO = 0
FSM = 1
MCM = 1
TXM = 1
To implement the power-down mode on the AD7912/AD7922,
the format bit, FO, can be set to 1, which sets the word length to
8 bits.
The connection diagram is shown in Figure 39. Note that, for
signal processing applications, the frame synchronization signal
from the TMS320C541 must provide equidistant sampling.
AD7912/
AD7922*
TMS320C541*
CLKX
DR
DX
FSX
FSR
SCLK
DOUT
DIN
CS
CLKR
0
*ADDITIONAL PINS REMOVED FOR CLARITY
Figure 39. Interfacing to the TMS320C541
AD7912/AD7922 to ADSP-218x
The ADSP-218x family of DSPs are interfaced directly to the
AD7912/AD7922 without any glue logic required. The SPORT
control register should be set up as follows:
TFSW = RFSW = 1, alternate framing
INVRFS = INVTFS = 1, active low frame signal
DTYPE = 00, right-justify data
ISCLK = 1, internal serial clock
TFSR = RFSR = 1, frame every word
IRFS = 0, set up RFS as an input
ITFS = 1, set up TFS as an output
SLEN = 1111, 16 bits for the AD7922
SLEN = 1101, 14 bits for the AD7912
To implement the power-down mode, SLEN should be set to
0111 to issue an 8-bit SCLK burst. The connection diagram is
shown in Figure 40. The ADSP-218x has the TFS and RFS of the
SPORT tied together, with TFS set as an output and RFS set as
an input. The DSP operates in alternate framing mode and the
SPORT control register is set up as described previously. The
frame synchronization signal generated on the TFS is tied to CS
and, as with all signal processing applications, equidistant
sampling is necessary. However, in this example, the timer
interrupt is used to control the sampling rate of the ADC and,
under certain conditions, equidistant sampling might not be
achieved.
AD7912/
AD7922*
ADSP-218x*
SCLK
RFS
TFS
SCLK
CS
DR
DOUT
DT
DIN
0
*ADDITIONAL PINS REMOVED FOR CLARITY
Figure 40. Interfacing to the ADSP-218x
The timer registers are loaded with a value that provides an
interrupt at the required sample interval. When an interrupt is
received, a value is transmitted with TFS/DT (ADC control
word). The TFS is used to control the RFS and, therefore, the
reading of data. The frequency of the serial clock is set in the
SCLKDIV register. When the instruction to transmit with TFS
is given, that is, TX0 = AX0, the state of the SCLK is checked.
The DSP waits until the SCLK has gone high, low, and high
again before transmission starts. If the timer and SCLK values
are chosen such that the instruction to transmit occurs on or
near the rising edge of SCLK, the data might be transmitted or
it might wait until the next clock edge.
相關PDF資料 |
PDF描述 |
|---|---|
| AD7912ARM | 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs |
| AD7912ARM-REEL | 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs |
| AD7912ARM-REEL7 | 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs |
| AD7922 | 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs |
| AD7922ARM | 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7912ARM | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 10-bit Serial 8-Pin MSOP 制造商:Rochester Electronics LLC 功能描述:DUAL 10-BIT, 1MSPS, ADC I.C - Bulk 制造商:Analog Devices 功能描述:10BIT ADC DUAL SMD 7912 MSOP8 |
| AD7912ARM-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 10-bit Serial 8-Pin MSOP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 1MSPS 10-BIT SERL 8MSOP - Tape and Reel |
| AD7912ARM-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 10-bit Serial 8-Pin MSOP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 1MSPS 10-BIT SERL 8MSOP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:DUAL 10-BIT, 1MSPS, ADC I.C - Tape and Reel |
| AD7912ARMZ | 功能描述:IC ADC 10BIT DUAL 2CH 8MSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:16 采樣率（每秒）:45k 數據接口:串行 轉換器數目:2 功率耗散（最大）:315mW 電壓電源:模擬和數字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數目和類型:2 個單端，單極 |
| AD7912ARMZ-REEL | 功能描述:IC ADC 10BIT DUAL 2CH 8MSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:2,500 系列:- 位數:16 采樣率（每秒）:15 數據接口:MICROWIRE?，串行，SPI? 轉換器數目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應商設備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數目和類型:16 個單端，雙極；8 個差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
發布緊急采購，3分鐘左右您將得到回復。