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參數(shù)資料
型號(hào): AD8072ARM
廠商: ANALOG DEVICES INC
元件分類(lèi): 音頻/視頻放大
英文描述: Low Cost, Dual/Triple Video Amplifiers
中文描述: 2 CHANNEL, VIDEO AMPLIFIER, PDSO8
封裝: MICRO, SOIC-8
文件頁(yè)數(shù): 9/11頁(yè)
文件大小: 167K
代理商: AD8072ARM
REV. A
AD8072/AD8073
–9–
APPLICATIONS
Overdrive Recovery
Overdrive of an amplifier occurs when the output and/or input
range are exceeded. The amplifier must recover from this overdrive
condition and resume normal operation. As shown in Figure 28,
the AD8072 and AD8073 recover within 75 ns from positive
overdrive and 30 ns from negative overdrive.
25ns
1V
V
IN
V
OUT
Figure 28. Overload Recovery; V
S
=
±
5 V, V
IN
= 8 V p-p,
R
F
= 1 k
, R
L
= 150
, G = +2
Bandwidth vs. Feedback Resistor Value
The closed-loop frequency response of a current feedback am-
plifier is a function of the feedback resistor. A smaller feedback
resistor will produce a wider bandwidth response. However, if
the feedback resistance becomes too small, the gain flatness can
be affected. As a practical consideration, the minimum value of
feedback resistance for the AD8072/AD8073 was found to be
649
. For resistances below this value, the gain flatness will be
affected and more significant lot to lot variations in device per-
formance will be noticed. Figure 29 shows a plot of the frequency
response of an AD8072/AD8073 at a gain of two with both feed-
back and gain resistors equal to 649
.
On the other hand, the bandwidth of a current feedback ampli-
fier can be decreased by increasing the feedback resistance. This
can sometimes be useful where it is desired to reduce the noise
bandwidth of a system. As a practical matter, the maximum
value of feedback resistor was found to be 2 k
. Figure 29
shows the frequency response of an AD8072/AD8073 at a gain
of two with both feedback and gain resistors equal to 2 k
.
FREQUENCY
MHz
6.1
G
6.0
0.1
500
1
10
100
5.9
5.8
5.4
5.7
5.6
5.5
R
F
= 2k
R
F
= 649
1 dB
DIV
0.1 dB
DIV
6
7
5
4
3
2
1
0
V
S
= 5V
A
V
= 2
R
L
= 150
V
O
= 0.2V p-p
C
Figure 29. Frequency Response vs. R
F
Capacitive Load Drive
When an op amp output drives a capacitive load, extra phase
shift due to the pole formed by the op amp’s output impedance
and the capacitor can cause peaking or even oscillation. The top
trace of Figure 30, R
S
= 0
, shows the output of one of the am-
plifiers of the AD8072/AD8073 when driving a 50 pF capacitor
as shown in the schematic of Figure 31.
The amount of peaking can be significantly reduced by adding
a resistor in series with the capacitor. The lower trace of Fig-
ure 30 shows the same capacitor being driven with a 25
resis-
tor in series with it. In general, the resistor value will have to be
experimentally determined, but from 10
to 50
is a practical
range of values to experiment with for capacitive loads of up to a
few hundred pF.
20ns
50mV
R
S
= 0
R
S
= 25
Figure 30. Capacitive Low Drive
1k
1k
50
V
IN
= 100mV p-p
R
L
1k
C
50pF
R
S
Figure 31. Capacitive Load Drive Circuit
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