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參數資料
型號: AD8130AR
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調理
英文描述: Low-Cost 270 MHz Differential Receiver Amplifiers
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封裝: SOIC-8
文件頁數: 20/28頁
文件大小: 510K
代理商: AD8130AR
REV. 0
AD8129/AD8130
–20–
THEORY OF OPERATION
The AD8129/AD8130 use an architecture called active feed-
back which differs from that of conventional op amps. The
most obvious differentiating feature is the presence of two sepa-
rate pairs of differential inputs compared to a conventional op
amp’s single pair. Typically for the active-feedback architecture,
one of these input pairs is driven by a differential input signal,
while the other is used for the feedback. This active stage in the
feedback path is where the term “active feedback” is derived.
The active feedback architecture offers several advantages over a
conventional op amp in several types of applications. Among
these are excellent common-mode rejection, wide input common-
mode range and a pair of inputs that are high-impedance and
totally balanced in a typical application. In addition, while an
external feedback network establishes the gain response as
in a conventional op amp, its separate path makes it totally
independent of the signal input. This eliminates any interaction
between the feedback and input circuits, which traditionally
causes problems with CMRR in conventional differential-input
op amp circuits.
Another advantage is the ability to change the polarity of the
gain merely by switching the differential inputs. A high input-
impedance inverting amplifier can be made. Besides a high
input impedance, a unity-gain inverter with the AD8130 will
have a noise gain of unity. This will produce lower output noise
and higher bandwidth than op amps that have noise gain equal
to 2 for a unity gain inverter.
The two differential input stages of the AD8129/AD8130 are each
transconductance stages that are well matched. These stages
convert the respective differential input voltages to internal
currents. The currents are then summed and converted to a
voltage, which is buffered to drive the output. The compensa-
tion capacitor is in the summing circuit.
When the feedback path is closed around the part, the output
will drive the feedback input to that voltage which causes the
internal currents to sum to zero. This occurs when the two
differential inputs are equal and opposite; that is, their algebraic
sum is zero.
In a closed-loop application, a conventional op amp will have its
differential input voltage driven to near zero under nontransient
conditions. The AD8129/AD8130 generally will have differential
input voltages at each of its input pairs, even under equilibrium
conditions. As a practical consideration, it is necessary to inter-
nally limit the differential input voltage with a clamp circuit.
Thus, the input dynamic ranges are limited to about 2.5 V for
the AD8130 and 0.5 V for the AD8129 (see Specification
section for more detail). For this and other reasons, it is not
recommended to reverse the input and feedback stages of the
AD8129/AD8130, even though some apparently normal func-
tionality might be observed under some conditions.
A few simple circuits can illustrate how the active feedback
architecture of the AD8129/AD8130 operates.
Op Amp Configuration
If only one of the input stages of the AD8129/AD8130 is used,
it will function very much like a conventional op amp. (See
Figure 4.) Classical inverting and noninverting op amps circuits
can be created, and the basic governing equations will be the
same as for a conventional op amp. The unused input pins form
the second input and should be shorted together and tied to
ground or some midsupply voltage when they are not used.
V
S
PD
+
V
S
+
+
R
F
R
G
0.1 F
10 F
V
V
OUT
V
IN
+V
0.1 F
10 F
Figure 4. With both inputs grounded, the feedback stage
functions like an op amp: V
OUT
= V
IN
(1 + R
F
/R
G
). NOTE: This
circuit is provided to demonstrate device operation. It is
not suggested to use this circuit in place of an op amp.
With the unused pair of inputs shorted, there is no differential
voltage between them. This dictates that the differential input
voltage of the used inputs will also be zero for closed-loop
applications. Since this is the governing principle of conven-
tional op amp circuits, an active feedback amplifier can function
as a conventional op amp under these conditions.
Note that this circuit is presented only for illustration purposes,
to show the similarities of the active feedback architecture func-
tionality to conventional op amp functionality. If it is desired to
design a circuit that can be created from a conventional op amp,
it is recommended to choose a conventional op amp whose
specifications are better suited to that application. These op amp
principles are the basis for offsetting the output as described in
the Output Offset/Level Translator section.
相關PDF資料
PDF描述
AD8130AR-REEL1 Low-Cost 270 MHz Differential Receiver Amplifiers
AD8130AR-REEL72 Low-Cost 270 MHz Differential Receiver Amplifiers
AD8130ARM Low-Cost 270 MHz Differential Receiver Amplifiers
AD8130ARM-REEL3 Low-Cost 270 MHz Differential Receiver Amplifiers
AD8130ARM-REEL72 Low-Cost 270 MHz Differential Receiver Amplifiers
相關代理商/技術參數
參數描述
AD8130AR 制造商:Analog Devices 功能描述:SEMICONDUCTOR ((NW))
AD8130AR-EB 制造商:Analog Devices 功能描述:LEADED EVALUATION BOARD - Boxed Product (Development Kits)
AD8130AR-EBZ 功能描述:BOARD EVAL FOR AD8130AR RoHS:是 類別:編程器,開發系統 >> 評估板 - 運算放大器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:-
AD8130ARM 功能描述:IC AMP DIFF LN LDIST 40MA 8MSOP RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:100 系列:- 放大器類型:通用 電路數:1 輸出類型:- 轉換速率:0.2 V/µs 增益帶寬積:- -3db帶寬:- 電流 - 輸入偏壓:100pA 電壓 - 輸入偏移:30µV 電流 - 電源:380µA 電流 - 輸出 / 通道:- 電壓 - 電源,單路/雙路(±):±2 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應商設備封裝:8-SO 包裝:管件
AD8130ARM-EBZ 功能描述:BOARD EVAL FOR AD8130ARM RoHS:是 類別:編程器,開發系統 >> 評估板 - 運算放大器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:-
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