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參數(shù)資料
型號: AD8130AR
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: Low-Cost 270 MHz Differential Receiver Amplifiers
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封裝: SOIC-8
文件頁數(shù): 22/28頁
文件大小: 510K
代理商: AD8130AR
REV. 0
AD8129/AD8130
–22–
20
10
10
20
30
40
50
60
70
80
FREQUENCY
Hz
I
0
10k
100k
1M
10M
100M
Figure 8. Transmission Response of 300 m of
Category 5 Cable
The feedback network is between Pins 6 and 5 and from Pin 5
to ground. C1 and R
F
create a corner frequency of about 800 kHz.
The gain increases to provide about 15 dB of boost at 8 MHz.
The response of this circuit is shown in Figure 9.
20
10
10
20
30
40
50
60
70
80
FREQUENCY
Hz
I
0
10k
100k
1M
10M
100M
Figure 9. Frequency Response of Equalizer Circuit
It is difficult to come up with the exact component values via
strictly mathematical means, because the equations for the cable
attenuation are approximate and have functions that are not
simply related to the responses of RC networks. The method
used in this design was to approximate the required response via
graphical means from the frequency response, and then select
components that would approximate this response. The circuit
was then built and measured, and finally adjusted to obtain an
acceptable response—in this case flat to 9 MHz to within
approximately 1 dB. (See Figure 10.)
20
10
10
20
30
40
50
60
70
80
FREQUENCY
Hz
I
0
10k
100k
1M
10M
100M
Figure 10. Combined Response of Cable Plus Equalizer
Output Offset/Level Translator
The circuit in Figure 6 has the reference input (Pin 4) tied to
ground, which produces a ground-referenced output signal. If it is
desired to offset the output voltage from ground, the REF input
can be used. (See Figure 11). The level V
OFFSET
appears at the
output with unity gain.
0.1 F
10 F
V
V
OUT
= V
IN
+V
OFFSET
+V
0.1 F
10 F
V
IN
V
OFFSET
V
S
PD
+V
S
+
+
AD8130
Figure 11. The voltage applied to Pin 4 adds to the unity-
gain output voltage produced by V
IN
.
If the circuit has a gain higher than unity, the gain has to be
factored in. If R
G
is connected to ground, the voltage applied to
REF will be multiplied by the gain of the circuit and appear at
the output; just like a noninverting conventional op amp, This
situation is not always desirable and one may want V
OFFSET
to
appear at the output with unity gain.
One way to accomplish this is to drive both REF and R
G
with
the desired offset signal. (See Figure 12.) Superposition can be
used to solve this circuit. First break the connection between
V
OFFSET
and R
G
. With R
G
grounded the gain from Pin 4 to
V
OUT
will be 1 + R
F
/R
G
. With Pin 4 grounded, the gain though
R
G
to V
OUT
is –R
F
/R
G
. The sum of these is +1. If V
REF
is delivered
from a low-impedance source, this will work fine. However, if
the delivered offset voltage is derived from a high-impedance
source, like a voltage divider, its impedance will affect the gain
equation. This makes the circuit more complicated as it creates
an interaction between the gain and offset voltage.
相關(guān)PDF資料
PDF描述
AD8130AR-REEL1 Low-Cost 270 MHz Differential Receiver Amplifiers
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD8130AR 制造商:Analog Devices 功能描述:SEMICONDUCTOR ((NW))
AD8130AR-EB 制造商:Analog Devices 功能描述:LEADED EVALUATION BOARD - Boxed Product (Development Kits)
AD8130AR-EBZ 功能描述:BOARD EVAL FOR AD8130AR RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估板 - 運(yùn)算放大器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:-
AD8130ARM 功能描述:IC AMP DIFF LN LDIST 40MA 8MSOP RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 放大器類型:通用 電路數(shù):1 輸出類型:- 轉(zhuǎn)換速率:0.2 V/µs 增益帶寬積:- -3db帶寬:- 電流 - 輸入偏壓:100pA 電壓 - 輸入偏移:30µV 電流 - 電源:380µA 電流 - 輸出 / 通道:- 電壓 - 電源,單路/雙路(±):±2 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應(yīng)商設(shè)備封裝:8-SO 包裝:管件
AD8130ARM-EBZ 功能描述:BOARD EVAL FOR AD8130ARM RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估板 - 運(yùn)算放大器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:-
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