欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號: AD8133ACP-REEL7
廠商: ANALOG DEVICES INC
元件分類: 通用總線功能
英文描述: Triple Differential Driver With Output Pull-Down
中文描述: TRIPLE LINE DRIVER, QCC24
封裝: 4 X 4 MM, MO-220VGGD-2, LFCSP-24
文件頁數(shù): 13/16頁
文件大小: 479K
代理商: AD8133ACP-REEL7
AD8133
CALCULATING AN APPLICATION CIRCUIT’S INPUT
IMPEDANCE
The effective input impedance of a circuit such as that in
Figure 34 at V
IP
and V
IN
depends on whether the amplifier is
being driven by a single-ended or differential signal source. For
balanced differential input signals, the differential input imped-
ance, R
IN, dm
, between the inputs V
IP
and V
IN
is simply
Rev. 0 | Page 13 of 16
1.5
2
=
×
=
G
dm
IN,
R
R
In the case of a single-ended input signal (for example, if V
IN
is
grounded and the input signal is applied to V
IP
), the input
impedance becomes:
(
)
125
.
2
1
=
+
×
=
F
G
F
G
R
dm
IN,
R
R
R
R
The circuit’s input impedance is effectively higher than it would
be for a conventional op amp connected as an inverter because
a fraction of the differential output voltage appears at the inputs
as a common-mode signal, partially bootstrapping the voltage
across the input resistor R
G
.
INPUT COMMON-MODE VOLTAGE RANGE IN SINGLE-
SUPPLY APPLICATIONS
The inputs of the AD8133 are designed to facilitate level-
shifting of ground referenced input signals on a single power
supply. For a single-ended input, this would imply, for example,
that the voltage at V
IN
in Figure 34 would be 0 V when the
amplifier’s negative power supply voltage was also set to 0 V.
It is important to ensure that the common-mode voltage at the
amplifier inputs, V
AP
and V
AN
, stays within its specified range.
Since voltages V
AP
and V
AN
are driven to be essentially equal by
negative feedback, the amplifier’s input common-mode voltage
can be expressed as a single term, V
ACM
. V
ACM
can be calculated
as follows
3
2
ICM
OCM
V
ACM
V
V
+
=
where V
ICM
is the common-mode voltage of the input signal, i.e.,
V
V
V
=
.
2
IN
IP
ICM
+
DRIVING A CAPACITIVE LOAD
A purely capacitive load can react with the output
impedance of the AD8133 to reduce phase margin, resulting in
high frequency ringing in the pulse response. The best way to
minimize this effect is to place a small resistor in series with
each of the amplifier’s outputs to buffer the load capacitance.
OUTPUT PULL-DOWN (OPD)
The AD8133 has an OPD pin that when pulled high signifi-
cantly reduces the power consumed while simultaneously
pulling the outputs to within less than 1 V of V
S
when used
with series diodes (see the Applications section). The equivalent
schematic of the output pull-down circuit is shown in Figure 35.
(The ESD diodes shown in Figure 35 are for ESD protection and
are distinct from the series diodes used with the output pull-
down feature.) See Figure 18 and Figure 21 for the output
pull-down transient and isolation performance plots. The
threshold levels for the OPD pin are referenced to the positive
power supply voltage and are presented in the Specifications
tables. When the OPD pin is pulled high, the AD8133 enters the
output low disable state.
V
OUT
ESD
DIODE
ESD
DIODE
V
CC
PULLDOWN
(OUTPUT IS
PULLED DOWN
WHEN SWITCH
IS CLOSED)
V
S–
0
V
S+
Figure 35. Output Pull-Down Equivalent Circuit
OUTPUT COMMON-MODE CONTROL
The AD8133 allows the user to control each of the three
common-mode output levels independently through the three
V
OCM
input pins. The V
OCM
pins pass a signal to the common-
mode output level of each of their respective amplifiers with
330 MHz of small signal bandwidth and an internally fixed
gain of one. In this way, additional control and communication
signals can be embedded on the common-mode levels as the
user sees fit.
With no external circuitry, the level at the V
OCM
input of each
amplifier defaults to approximately midsupply. An internal
resistive divider with an impedance of approximately 100 k
sets this level. To limit common-mode noise in dc common-
mode applications, external bypass capacitors should be
connected from each of the V
OCM
input pins to ground.
相關(guān)PDF資料
PDF描述
AD8133ACPZ-REEL Triple Differential Driver With Output Pull-Down
AD8133ACPZ-REEL7 Triple Differential Driver With Output Pull-Down
AD8137 Low Cost, Low Power 12-Bit Differential ADC Driver
AD8137YCP-R2 Low Cost, Low Power 12-Bit Differential ADC Driver
AD8137YCP-REEL Low Cost, Low Power 12-Bit Differential ADC Driver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD8133ACPZ-R2 制造商:Analog Devices 功能描述:SP Amp DIFF Line Driver Amp Triple ±6V/12V 24-Pin LFCSP EP T/R 制造商:Analog Devices 功能描述:SP AMP DIFF LINE DRVR AMP TRIPLE 6V/12V 24LFCSP EP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:- Bulk
AD8133ACPZ-REEL 功能描述:IC OPAMP DIFF TRPL LDIST 24LFCSP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 放大器類型:通用 電路數(shù):1 輸出類型:- 轉(zhuǎn)換速率:0.2 V/µs 增益帶寬積:- -3db帶寬:- 電流 - 輸入偏壓:100pA 電壓 - 輸入偏移:30µV 電流 - 電源:380µA 電流 - 輸出 / 通道:- 電壓 - 電源,單路/雙路(±):±2 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應(yīng)商設(shè)備封裝:8-SO 包裝:管件
AD8133ACPZ-REEL7 功能描述:IC OPAMP DIFF TRPL LDIST 24LFCSP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 放大器類型:通用 電路數(shù):2 輸出類型:滿擺幅 轉(zhuǎn)換速率:350 V/µs 增益帶寬積:180MHz -3db帶寬:320MHz 電流 - 輸入偏壓:12.5µA 電壓 - 輸入偏移:800µV 電流 - 電源:15mA 電流 - 輸出 / 通道:85mA 電壓 - 電源,單路/雙路(±):2.5 V ~ 12.6 V,±1.25 V ~ 6.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP,8-MSOP(0.118",3.00mm 寬) 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR)
AD8134 制造商:AD 制造商全稱:Analog Devices 功能描述:Triple Differential Driver With Sync-On-Common-Mode
AD8134ACP-R2 制造商:Analog Devices 功能描述:SP Amp DIFF Line Driver Amp Triple 制造商:Analog Devices 功能描述:SP AMP DIFF LINE DRVR AMP TRIPLE 6V/6V 24LFCSP EP - Tape and Reel
主站蜘蛛池模板: 普定县| 新化县| 西城区| 遵义县| 深水埗区| 探索| 互助| 红河县| 会理县| 上饶市| 安庆市| 手游| 绵竹市| 岢岚县| 江津市| 霍林郭勒市| 荆州市| 志丹县| 定南县| 卓尼县| 盘山县| 合山市| 奉新县| 雷山县| 汉沽区| 伊春市| 濮阳市| 崇州市| 紫阳县| 略阳县| 通江县| 衢州市| 利辛县| 康平县| 汪清县| 临西县| 白水县| 神农架林区| 龙口市| 阿坝| 丘北县|