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參數資料
型號: AD8138ARZ-RL
廠商: ANALOG DEVICES INC
元件分類: 通用總線功能
英文描述: Low Distortion Differential ADC Driver
中文描述: LINE DRIVER, PDSO8
封裝: LEAD FREE, MS-012AA, SOIC-8
文件頁數: 7/24頁
文件大小: 318K
代理商: AD8138ARZ-RL
AD8138
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Supply Voltage
V
OCM
Internal Power Dissipation
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering 10 sec)
Junction Temperature
Rev. F | Page 7 of 24
Ratings
±5.5 V
±V
S
550 mW
40°C to +85°C
65°C to +150°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, θ
JA
is
specified for the device soldered in a circuit board in still air.
Table 6.
Package Type
8-Lead SOIC/4-Layer
8-Lead MSOP/4-Layer
Maximum Power Dissipation
The maximum safe power dissipation in the AD8138 packages
is limited by the associated rise in junction temperature (T
J
) on
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the AD8138. Exceeding a junction temperature
of 150°C for an extended period can result in changes in the
silicon devices, potentially causing failure.
θ
JA
121
145
Unit
°C/W
°C/W
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
S
) times the
quiescent current (I
S
). The load current consists of the differential
and common-mode currents flowing to the load, as well as
currents flowing through the external feedback networks and
internal common-mode feedback loop. The internal resistor tap
used in the common-mode feedback loop places a negligible
differential load on the output. RMS voltages and currents
should be considered when dealing with ac signals.
Airflow reduces θ
JA
. In addition, more metal directly in contact
with the package leads from metal traces through holes, ground,
and power planes reduces the θ
JA
.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 8-lead SOIC
(121°C/W) and 8-lead MSOP (θ
JA
= 145°C/W) packages on a
JEDEC standard 4-layer board. θ
JA
values are approximations.
AMBIENT TEMPERATURE (°C)
M
1.75
1.50
1.00
1.25
0.50
0.25
0.75
0
SOIC
MSOP
0
–40 –30 –20 –10
0
10
20
30
40
50
60
70
80
90 100 110 120
Figure 3. Maximum Power Dissipation vs. Temperature
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
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