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參數資料
| 型號： | AD8203YRZ-R7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | High Common-Mode Voltage, Single-Supply Difference Amplifier |
| 中文描述： | OP-AMP, 1000 uV OFFSET-MAX, PDSO8 |
| 封裝： | LEAD FREE, MS-012AA, SOIC-8 |
| 文件頁數： | 12/20頁 |
| 文件大小： | 239K |
| 代理商： | AD8203YRZ-R7 |
AD8203
THEORY OF OPERATION
The AD8203 consists of a preamp and buffer, arranged as
shown in Figure 40. Like-named resistors have equal values.
Rev. B | Page 12 of 20
The preamp incorporates a dynamic bridge (subtractor) circuit.
Identical networks (within the shaded areas) consisting of R
A
,
R
B
, R
Pin 8. Note that when equal amplitude signals are asserted at
Input 1 and Input 8, and the output of A1 is equal to the
common potential (that is, 0), the two attenuators form a
balanced-bridge network. When the bridge is balanced, the
differential input voltage at A1, and thus its output, is 0.
C
, and R
G
, attenuate input signals applied to Pin 1 and
Any common-mode voltage applied to both inputs keeps the
bridge balanced and the A1 output at 0. Because the resistor
networks are carefully matched, the common-mode signal
rejection approaches this ideal state.
However, if the signals applied to the inputs differ, the result is a
difference at the input to A1. A1 responds by adjusting its output
to drive R
B
, by way of R
input until it matches the voltage at its noninverting input.
G
, to adjust the voltage at its inverting
By attenuating voltages at Pin 1 and Pin 8, the amplifier inputs
are held within the power supply range, even if Pin 1 and Pin 8
input levels exceed the supply or fall below common (ground).
The input network also attenuates normal (differential) mode
voltages. R
C
and R
G
form an attenuator that scales A1 feedback,
forcing large output signals to balance relatively small differen-
tial inputs. The resistor ratios establish the preamp gain at 7.
Because the differential input signal is attenuated and then
amplified to yield an overall gain of 7, Amplifier A1 operates at
a higher noise gain, multiplying deficiencies such as input offset
voltage and noise with respect to Pin 1 and Pin 8.
A1
A3
R
CM
R
CM
(TRIMMED)
100k
Ω
R
A
–IN
1
R
G
R
C
R
B
R
A
R
C
R
B
R
G
+IN
8
COM
A2
R
F
R
F
AD8203
5
4
3
2
0
Figure 40. Simplified Schematic
To minimize these errors while extending the common-mode
range, a dedicated feedback loop is used to reduce the range of
common-mode voltage applied to A1 for a given overall range
at the inputs. By offsetting the range of voltage applied to the
compensator, the input common-mode range is also offset to
include voltages more negative than the power supply. The
A3 amplifier detects the common-mode signal applied to A1
and adjusts the voltage on the matched R
CM
resistors to reduce
the common-mode voltage range at the A1 inputs. By adjusting
the common voltage of these resistors, the common-mode input
range is extended while, at the same time, the normal mode
signal attenuation is reduced, leading to better performance
referred to input.
The output of the dynamic bridge taken from A1 is connected
to Pin 3 by way of a 100 kΩ series resistor, provided for low-
pass filtering and gain adjustment. The resistors in the input
networks of the preamp and the buffer feedback resistors are
ratio-trimmed for high accuracy.
The output of the preamp drives a gain-of-2 buffer amplifier,
A2, implemented with carefully matched feedback resistors R .
F
The 2-stage system architecture of the AD8203 enables the user
to incorporate a low-pass filter prior to the output buffer. By
separating the gain into two stages, a full-scale, rail-to-rail
signal from the preamp can be filtered at Pin 3, and a half-scale
signal, resulting from filtering, can be restored to full scale by
the output buffer amp. The source resistance seen by the
inverting input of A2 is approximately 100 kΩ to minimize the
effects of the input bias current of A2. However, this current is
quite small, and errors resulting from applications that
mismatch the resistance are correspondingly small.
The A2 input bias current has a typical value of 40 nA, however,
this can increase under certain conditions. For example, if the
input signal to the A2 amplifier is V
CC
/2, the output attempts to
go to V
CC
due to the gain of 2. However, the output saturates
because the maximum specified voltage for correct operation is
200 mV below V
CC
. Under these conditions the total input bias
current increases (see Figure 41 for more information).
DIFFERENTIAL MODE VOLTAGE (V)
A
–140
0
0
–120
–100
–80
–60
–40
–20
0.5
0
1.0
1.5
2.0
2.5
Figure 41. A2 Input Bias Current vs. Input Voltage and Temperature. The
Shaded Area Is the Bias Current from 40°C to +125°C.
An increase in the A2 bias current, in addition to the output
saturation voltage of A1, directly affects the output voltage of
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相關代理商/技術參數 |
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|---|---|
| AD8203YRZ-RL | 功能描述:IC AMP DIFF 60KHZ 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:2,500 系列:- 放大器類型:通用 電路數:1 輸出類型:滿擺幅 轉換速率:0.11 V/µs 增益帶寬積:350kHz -3db帶寬:- 電流 - 輸入偏壓:4nA 電壓 - 輸入偏移:20µV 電流 - 電源:260µA 電流 - 輸出 / 通道:20mA 電壓 - 電源，單路/雙路(±):2.7 V ~ 36 V，±1.35 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SO 包裝:帶卷 (TR) |
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| AD8205AR | 制造商:Analog Devices 功能描述:- Bulk |
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| AD8205WHRZ-RL | 制造商:Analog Devices 功能描述:42VSNGLSUPPLYDIFFAMP - Tape and Reel 制造商:Analog Devices 功能描述:IC OPAMP DIFF 50KHZ 8SOIC 制造商:Analog Devices 功能描述:42V Sngl Supply Diff Amp |
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