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參數資料
| 型號： | AD824BN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Single Supply, Rail-to-Rail Low Power, FET-Input Op Amp |
| 中文描述： | QUAD OP-AMP, 2500 uV OFFSET-MAX, 2 MHz BAND WIDTH, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數： | 5/16頁 |
| 文件大小： | 551K |
| 代理商： | AD824BN |
AD824
REV. A
–5–
WAFER TEST LIMITS
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage High
Output Voltage Low
Supply Current/Amplifier
V
OS
I
B
I
OS
V
CM
CMRR
PSRR
A
VO
V
OH
V
OL
I
SY
1.0
12
20
–0.2 to 3.0
66
70
15
4.975
25
600
mV max
pA max
pA
V min
dB min
μ
V/V
V/mV min
V min
mV max
μ
A max
V
CM
= 0 V to 2 V
V = + 2.7 V to +12 V
R
L
= 2 k
I
SOURCE
= 20
μ
A
I
SINK
= 20
μ
A
V
O
= 0 V, R
L
=
∞
NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly
methods and normal yield loss, yield after packaging is not guaranteed for
standard product dice. Consult factory to negotiate specifications based on dice
lot qualifications through sample lot assembly and testing.
(@ V
S
= +5.0 V, V
CM
= 0 V, T
A
= +25
8
C unless otherwise noted)
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD824 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . –V
S
– 0.2 V to +V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .
±
30 V
Output Short Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
N, R Package . . . . . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Operating Temperature Range
AD824A, B . . . . . . . . . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Junction Temperature Range
N, R Package . . . . . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300
°
C
Package Type
θ
JA2
θ
JC
Units
14-Pin Plastic DIP (N)
14-Pin SOIC (R)
16-Pin SOIC (R)
76
120
92
33
36
27
°
C/W
°
C/W
°
C/W
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts unless
otherwise noted.
2
θ
JA
is specified for the worst case conditions, i.e.,
θ
JA
is specified for device in socket
for P-DIP packages;
θ
JA
is specified for device soldered in circuit board for SOIC
package.
ORDERING GUIDE
Temperature
Range
Model
Package Option
AD824AN
AD824BN
AD824AR
AD824AR-3V
AD824AN-3V
AD824AR-14
AD824AR-14-3V
AD824AR-16
AD824AChips
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
+25
°
C
14-Pin Plastic DIP
14-Pin Plastic DIP
14-Pin SOIC
14-Pin SOIC
14-Pin Plastic DIP
14-Pin SOIC
14-Pin SOIC
16-Pin SOIC
DICE
DICE CHARACTERISTICS
AD824 Die Size 0.70 X 0.130 inch, 9,100 sq. mils.
Substrate (Die Backside) Is Connected to V+. Transistor
Count, 143.
I6
R1
R2
R9
R7
R17
R14
R12
R13
R15
V
CC
I5
Q18
Q29
Q27
Q21
Q20
Q23
Q25
Q24
Q31
Q28
Q22
Q19
Q7
Q6
Q5
Q8
Q3
Q2
Q4
I1
I2
I3
I4
+IN
J1
–IN
C1
Q26
V
OUT
J2
V
EE
C3
C2
C4
Figure 1. Simplified Schematic of 1/4 AD824
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