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參數資料
| 型號： | AD8302ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | LF.2.7 GHz RF/IF Gain and Phase Detector |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數： | 17/24頁 |
| 文件大小： | 533K |
| 代理商： | AD8302ARU |
REV. 0
AD8302
–17–
Interfacing to the Input Channels
The single-ended input interfaces for both channels are identical
and each consists of a driving pin, INPA and INPB, and an ac
grounding pin, OFSA and OFSB. All four pins are internally dc
biased at about 100 mV from the positive supply and should be
externally ac-coupled to the input signals and to ground. For the
signal pins, the coupling capacitor should offer negligible imped-
ance at the signal frequency. For the grounding pins, the coupling
capacitor has two functions: it provides ac grounding and sets the
high-pass corner frequency for the internal offset compensation
loop. There is an internal 10 pF capacitor to ground that sets the
maximum corner to approximately 200 MHz. The corner can be
lowered according the formula f
HP
(MHz) = 2/C
C
(nF), where C
C
is the total capacitance from OFSA or OFSB to ground, including
the internal 10 pF.
The input impedance to INPA and INPB is a function of
frequency, the offset compensation capacitor and package
parasitics. At moderate frequencies above f
HP
, the input network
can be approximated by a shunt 3 k
resistor in parallel with a
2 pF capacitor. At higher frequencies, the shunt resistance
decreases to approximately 500
. The Smith chart in Figure 6
shows the input impedance over the frequency range 100 MHz
to 3 GHz.
2.2GHz
2.7GHz
3.0GHz
1.8GHz
900MHz
100MHz
Figure 6. Smith Chart Showing the Input Impedance of a
Single Channel from 100 MHz to 3 GHz
A broadband resistive termination on the signal side of the
coupling capacitors can be used to match to a given source
impedance. The value of the termination resistor, R
T
, is deter-
mined by,
R
T
=
R
IN
R
S
/(
R
IN
–
R
S
)
where
R
IN
is the input resistance and
R
S
the source impedance.
At higher frequencies, a reactive, narrow-band match might be
desirable to tune out the reactive portion of the input imped-
ance. An important attribute of the two-log-amp architecture is
that if both channels are at the same frequency and have the same
input network, then impedance mismatches and reflection losses
become essentially common-mode and hence do not impact the
relative gain and phase measurement. However, mismatches in
these external components can result in measurement errors.
(10)
Dynamic Range
The maximum measurement range for the gain subsystem is
limited to a total of 60 dB distributed from –30 dB to +30 dB.
This means that both gain and attenuation can be measured.
The limits are determined by the minimum and maximum levels
that each individual log amp can detect. In the AD8302, each log
amp can detect inputs ranging from –73 dBV (223
μ
V, –60 dBm
re: 50
to –13 dBV (223 mV, 0 dBm re: 50
). Note that log
amps respond to voltages and not power. An equivalent power
can be inferred given an impedance level, e.g., to convert from
dBV to dBm in a 50
system, simply add 13 dB. To cover the
entire range, it is necessary to apply a reference level to one log
amp that corresponds precisely to its midrange. In the AD8302,
this level is at –43 dBV, which corresponds to –30 dBm in a
50
environment. The other channel can now sweep from its
low end, 30 dB below midrange, to its high end, 30 dB above
midrange. If the reference is displaced from midrange, some
measurement range will be lost at the extremes. This can occur
either if the log amps run out of range or if the rails at ground or
1.8 V are reached. Figure 7 illustrates the effect of the reference
channel level placement. If the reference is chosen lower than
midrange by 10 dB, then the lower limit will be at –20 dB rather
than –30 dB. If the reference chosen is higher by 10 dB, the upper
limit will be 20 dB rather than 30 dB.
GAIN MEASUREMENT RANGE
–
dB
–
30
0
+30
1.80
0.90
V
–
MAX RANGE FOR V
REF
= V
REF
OPT
V
REF
> V
REF
OPT
V
REF
< V
REF
OPT
Figure 7. The Effect of Offsetting the Reference Level is to
Reduce the Maximum Dynamic Range.
The phase measurement range is of 0 to 180
°
. For phase differ-
ences of 0
°
to –180
°
, the transfer characteristics are mirrored as
shown in Figure 5, with a slope of the opposite sign. The phase
detector responds to the relative position of the zero crossings
between the two input channels. At higher frequencies, the finite
rise and fall times of the amplitude limited inputs create an
ambiguous situation that leads to inaccessible dead zones at the
0
°
and 180
°
limits. For maximum phase difference coverage, the
reference phase difference should be set to 90
°
.
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| AD8302ARU-REEL | 制造商:Analog Devices 功能描述:RF/IF Gain and Phase Detector 14-Pin TSSOP T/R 制造商:Analog Devices 功能描述:RF/IF GAIN AND PHASE DETECTOR 14TSSOP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:TSSOP LF-3GHZ GAIN PHASE DETECTOR - Tape and Reel |
| AD8302ARU-REEL7 | 功能描述:IC DETECTOR RF/IF 14-TSSOP T/R RoHS:否 類別:RF/IF 和 RFID >> RF 檢測器 系列:- 產品變化通告:Product Discontinuation 15/May/2006 標準包裝:3,000 系列:- 頻率:100MHz ~ 2GHz RF 型:手機，GSM，DCS，PCS 輸入范圍:- 精確度:- 電源電壓:2.7 V ~ 5.5 V 電流 - 電源:300µA 包裝:帶卷 (TR) 封裝/外殼:SC-74，SOT-457 其它名稱:NCS5000SNT1GOS |
| AD8302ARUZ | 功能描述:IC DETECT GAIN PHASE 14-TSSOP RoHS:是 類別:RF/IF 和 RFID >> RF 檢測器 系列:- 產品變化通告:Product Discontinuation 15/May/2006 標準包裝:3,000 系列:- 頻率:100MHz ~ 2GHz RF 型:手機，GSM，DCS，PCS 輸入范圍:- 精確度:- 電源電壓:2.7 V ~ 5.5 V 電流 - 電源:300µA 包裝:帶卷 (TR) 封裝/外殼:SC-74，SOT-457 其它名稱:NCS5000SNT1GOS |
| AD8302ARUZ | 制造商:Analog Devices 功能描述:Logarithmic Amplifier IC |
| AD8302ARUZ-REEL | 功能描述:IC DETECTOR RF/IF 14TSSOP RoHS:是 類別:RF/IF 和 RFID >> RF 檢測器 系列:- 產品變化通告:Product Discontinuation 15/May/2006 標準包裝:3,000 系列:- 頻率:100MHz ~ 2GHz RF 型:手機，GSM，DCS，PCS 輸入范圍:- 精確度:- 電源電壓:2.7 V ~ 5.5 V 電流 - 電源:300µA 包裝:帶卷 (TR) 封裝/外殼:SC-74，SOT-457 其它名稱:NCS5000SNT1GOS |
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