- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373944 > AD8332ARU (ANALOG DEVICES INC) Ultralow Noise VGAs with Preamplifier and Programmable RIN PDF資料下載
參數(shù)資料
| 型號： | AD8332ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Ultralow Noise VGAs with Preamplifier and Programmable RIN |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| 封裝： | MO-153AE, TSSOP-28 |
| 文件頁數(shù)： | 23/32頁 |
| 文件大小： | 482K |
| 代理商： | AD8332ARU |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當(dāng)前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
AD8331/AD8332
Gain Input
Pin GAIN is common to both channels of the AD8332. The
input impedance is nominally 10 M
and a bypass capacitor
from 100 pF to1 nF is recommended.
Rev. C | Page 23 of 32
Parallel connected devices may be driven by a common voltage
source or DAC. Decoupling should take into account any
bandwidth considerations of the drive waveform, using the total
distributed capacitance.
If gain control noise in LO gain mode becomes a factor,
maintaining ≤15 nV/√Hz noise at the GAIN pin will ensure
satisfactory noise performance. Internal noise prevails below
15 nV/√Hz at the GAIN pin. Gain control noise is negligible in
HI gain mode.
VCM Input
The common-mode voltage of Pins VCM, VOL, and VOH
defaults to 2.5 Vdc. With output ac-coupled applications, the
VCM pin will be unterminated; however, it must still be
bypassed in close proximity for ac grounding of internal
circuitry. The VGA outputs may be dc connected to a
differential load, such as an ADC. Common-mode output
voltage levels between 1.5 V and 3.5 V may be realized at Pins
VOH and VOL by applying the desired voltage at Pin VCM.
DC-coupled operation is not recommended when driving loads
on a separate PC board.
The voltage on the VCM pin is sourced by an internal buffer
with an output impedance of 30 Ω and a ±2 mA default output
current (see Figure 68). If the VCM pin is driven from an
external source, its output impedance should be <<30 Ω and its
current drive capability should be >>2 mA. If the VCM pins of
several devices are connected in parallel, the external buffer
should be capable of overcoming their collective output
currents. When a common-mode voltage other than 2.5 V is
used, a voltage-limiting resistor, R
CLMP
, is needed to protect
against overload.
V
CM
NEW V
CM
R
O
<< 30
100pF
2mA MAX
30
0.1
μ
F
INTERNAL
CIRCUITRY
AC GROUNDING FOR
INTERNAL CIRCUITRY
0
Figure 68. VCM Interface
Logic Inputs—ENB, MODE, and HILO
The input impedance of all enable pins is nominally 25 kΩ and
may be pulled up to 5 V (a pull-up resistor is recommended) or
driven by any 3 V or 5 V logic families. The enable pins perform
a power-down function, when disabled, the VGA outputs are
near ground. Multiple devices may be driven from a common
source. Consult the pin-function tables for circuit functions
controlled by the enable pins.
Pin HILO is compatible with 3 V or 5 V CMOS logic families. It
is either connected to ground or pulled up to 5 V, depending on
the desired gain range and output noise.
Optional Output Voltage Limiting
The RCLMP pin provides the user with a means to limit the
output voltage swing when used with loads that have no
provisions for prevention of input overdrive. The peak-to-peak
limited voltage is adjusted by a resistor to ground, and Table
lists several voltage levels and the corresponding resistor value.
Unconnected, the default limiting level is 4.5 V p-p.
Note that third harmonic distortion will increase as waveform
amplitudes approach clipping. For lowest distortion, the clamp
level should be set higher than the converter input span. A
clamp level of 1.5 V p-p is recommended for a 1 V p-p linear
output range, 2.7 V p-p for a 2 V p-p range, or 1 V p-p for a
0.5 V p-p operation. The best solution will be determined
experimentally. Figure 69 shows third harmonic distortion
as a function of the limiting level for a 2 V p-p output signal.
A wider limiting level is desirable in HI gain mode.
H
5.0
–50
–40
–30
–80
–70
–60
2.0
3.5
1.5
3.0
2.5
CLAMP LIMIT LEVEL (V p-p)
4.0
4.5
–20
V
GAIN
= 0.75V
HILO = HI
HILO = LO
0
Figure 69. HD3 vs. Clamping Level for 2 V p-p Differential Input
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD8331ARQ-REEL | Ultralow Noise VGAs with Preamplifier and Programmable RIN |
| AD8331ARQ-REEL7 | Ultralow Noise VGAs with Preamplifier and Programmable RIN |
| AD8341 | 1.5 GHz to 2.4 GHz RF Vector Modulator |
| AD8341-EVAL | 1.5 GHz to 2.4 GHz RF Vector Modulator |
| AD8341ACPZ-REEL72 | 1.5 GHz to 2.4 GHz RF Vector Modulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8332ARU-REEL | 功能描述:IC VGA DUAL W/PREAMP LN 28-TSSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:X-AMP® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| AD8332ARU-REEL7 | 功能描述:IC VGA DUAL W/PREAMP LN 28-TSSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:X-AMP® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| AD8332ARUZ | 功能描述:IC VGA DUAL W/PREAMP LN 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:X-AMP® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| AD8332ARUZ | 制造商:Analog Devices 功能描述:IC PRE-AMP ULTRA LOW NOISE |
| AD8332ARUZ-R7 | 功能描述:IC AMP VAR GAIN 2CHAN 28TSSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:X-AMP® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。