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參數(shù)資料
| 型號： | AD8354 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 100 MHz-2.7 GHz RF Gain Block |
| 中文描述： | 100兆赫- 2.7 GHz射頻增益模塊 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大小： | 275K |
| 代理商： | AD8354 |
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
Tel: 781/329-4700 Fax: 781/326-8703
www.analog.comAD8354
100 MHz to 2.7 GHz
RF Gain Block
FEATURES
Fixed Gain of 20 dB
Operational Frequency of 100 MHz to 2.7 GHz
Linear Output Power-Up to 4 dBm
Input/Output Internally Matched to 50
Temperature and Power Supply Stable
Noise Figure 4.2 dB
Power Supply 3 V or 5 V
APPLICATIONS
VCO Buffers
General Tx/Rx Amplification
Power Amplifier Predriver
Low Power Antenna Driver
FUNCTIONAL BLOCK DIAGRAM
BIAS AND VREF
COM1
INPT
VOUT
VPOS
COM2
AD8354
GENERAL DESCRIPTION
The AD8354 is a broadband, fixed-gain linear amplifier that
operates at frequencies from 100 MHz up to 2.7 GHz. It is
intended for use in a wide variety of wireless devices including
cellular, broadband, CATV, and LMDS/MMDS applications.
By taking advantage of Analog Devices’ high performance
complementary Si bipolar process, these gain blocks provide
excellent stability over process, temperature, and power supply.
This amplifier is single-ended and internally matched to 50
with a return loss of greater than 10 dB over the full operating
frequency range.
The AD8354 provides linear output power of nearly 4.3 dBm
with 20 dB of gain at 900 MHz when biased at 3 V and an
external RF choke is connected between the power supply and
the output pin. The dc supply current is 24 mA. At 900 MHz,
the output third order intercept (OIP3) is greater than 18 dBm;
at 2.7 GHz, the OIP3 is 14 dBm.
The noise figure is 4.2 dB at 900 MHz. The reverse isolation
(S
12
) is –33 dB at 900 MHz.
The AD8354 can also operate with a 5 V power supply, in which
case no external inductor is required. Under these conditions,
the AD8354 delivers 4.8 dBm with 20 dB of gain at 900 MHz.
The dc supply current is 26 mA. At 900 MHz, the OIP3 is
greater than 19 dBm, and at 2.7 GHz, the OIP3 is 15 dBm.
The noise figure is 4.4 dB at 900 MHz. The reverse isolation
(S
12
) is –33 dB.
The AD8354 is fabricated on Analog Devices’ proprietary, high
performance 25 GHz Si complementary bipolar IC process. The
AD8354 is available in a chip scale package that utilizes an exposed
paddle for excellent thermal impedance and low impedance
electrical connection to ground. It operates over a –40
°
C to
+85
°
C temperature range.
An evaluation board is available.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD8354ACP-R2 | 100 MHz-2.7 GHz RF Gain Block |
| AD8354-EVAL | 100 MHz-2.7 GHz RF Gain Block |
| AD8354ACP-REEL7 | 100 MHz-2.7 GHz RF Gain Block |
| AD835 | 250 MHz, Voltage Output 4-Quadrant Multiplier |
| AD835AN | 250 MHz, Voltage Output 4-Quadrant Multiplier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8354_05 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 MHz to 2.7 GHz RF Gain Block |
| AD8354ACP-R2 | 功能描述:IC RF GAIN BLOCK 8-LFCSP RoHS:否 類別:RF/IF 和 RFID >> RF 放大器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 頻率:100MHz ~ 6GHz P1dB:9.14dBm（8.2mW） 增益:15.7dB 噪音數(shù)據(jù):1.3dB RF 型:CDMA，TDMA，PCS 電源電壓:2.7 V ~ 5 V 電流 - 電源:60mA 測試頻率:2GHz 封裝/外殼:0505（1412 公制） 包裝:帶卷 (TR) |
| AD8354ACP-REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| AD8354ACP-REEL7 | 制造商:Analog Devices 功能描述:RF Amp Chip Single GP 2.7GHz 5.5V 8-Pin LFCSP EP T/R |
| AD8354ACPZ | 制造商:Analog Devices 功能描述:IC AMP RF/IF SMD LFCSP-8 8354 制造商:Analog Devices 功能描述:IC, AMP, RF/IF, SMD, LFCSP-8, 8354 制造商:Analog Devices 功能描述:AD8354ACPZ |
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