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參數資料
| 型號： | AD8354 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 100 MHz-2.7 GHz RF Gain Block |
| 中文描述： | 100兆赫- 2.7 GHz射頻增益模塊 |
| 文件頁數： | 11/16頁 |
| 文件大小： | 275K |
| 代理商： | AD8354 |
REV. A
AD8354
–11–
THEORY OF OPERATION
The AD8354 is a two-stage feedback amplifier employing both
shunt-series and shunt-shunt feedback. The first stage is degen-
erated and resistively loaded, and provides approximately 10 dB
of gain. The second stage is a PNP-NPN Darlington output
stage, which provides another 10 dB of gain. Series-shunt feed-
back from the emitter of the output transistor sets the input
impedance to 50
over a broad frequency range. Shunt-shunt
feedback from the amplifier output to the input of the Darlington
stage helps to set the output impedance to 50
. The amplifier
can be operated from a 3 V supply by adding a choke inductor
from the amplifier output to VPOS. Without this choke inductor,
operation from a 5 V supply is also possible.
BASIC CONNECTIONS
The AD8354 RF gain block is a fixed-gain amplifier with single-
ended input and output ports whose impedances are nominally
equal to 50
over the frequency range 100 MHz to 2.7 GHz.
Consequently, it can be directly inserted into a 50
system
with no impedance matching circuitry required. The input and
output impedances are sufficiently stable versus variations in
temperature and supply voltage that no impedance matching
compensation is required. A complete set of scattering parameters
is available at the Analog Devices website (www.analog.com).
The input pin (INPT) is connected directly to the base of the
first amplifier stage, which is internally biased to approximately
1 V, so a dc-blocking capacitor should be connected between
the source that drives the AD8354 and the input pin, INPT.
It is critical to supply very low inductance ground connections
to the ground pins (Pins 1, 4, 5, and 8) as well as to the back-
side exposed paddle. This will ensure stable operation.
The AD8354 is designed to operate over a wide supply voltage
range from 2.7 V to 5.5 V. The output of the part, VOUT, is
taken directly from the collector of the output amplifier stage.
This node is internally biased to approximately 3.2 V when the
supply voltage is 5 V. Consequently, a dc-blocking capacitor
should be connected between the output pin, VOUT, and the
load that it drives. The value of this capacitor is not critical, but
it should be 100 pF or larger.
When the supply voltage is 3 V, it is recommended that an external
RF choke be connected between the supply voltage and the
output pin, VOUT. This will increase the dc voltage applied to
the collector of the output amplifier stage, which will improve
performance of the AD8354 to be very similar to the perfor-
mance produced when 5 V is used for the supply voltage. The
inductance of the RF choke should be approximately 100 nH.
Care should be taken to ensure that the lowest series self-resonant
frequency of this choke is well above the maximum frequency of
operation for the AD8354.
The supply voltage input, VPOS, should be bypassed using a large
value capacitance (approximately 0.47
μ
F or larger) and a smaller,
high frequency bypass capacitor (approximately 100 pF) physi-
cally located close to the VPOS pin.
The recommended connections and components are shown in
the schematic of the AD8354 evaluation board (Figure 3).
APPLICATIONS
The AD8354 RF gain block may be used as a general-purpose
fixed-gain amplifier in a wide variety of applications, such as a
driver for a transmitter power amplifier (Figure 1). Its excellent
reverse isolation also makes this amplifier suitable for use as a
local oscillator buffer amplifier that would drive the local oscilla-
tor port of an up or down converter mixer (Figure 2).
AD8354
HIGH POWER
AMPLIFIER
Figure 1. AD8354 as a Driver Amplifier
MIXER
AD8354
LOCAL
OSCILLATOR
Figure 2. AD8354 as a LO Driver Amplifier
NC = NO CONNECT
COM1
NC
INPT
COM1
VOUT
VPOS
COM2
COM2
AD8354
C3
100pF
C4
0.47 F
VP
OUTPUT
1
2
3
4
5
6
7
8
C2
1000pF
C1
1000pF
INPUT
L1
Figure 3. Evaluation Board Schematic
EVALUATION BOARD
Figure 3 shows the schematic of the AD8354 evaluation board.
Note that L1 is shown as an optional component, which is used
to obtain maximum gain only when V
P
= 3 V. The board is
powered by a single supply in the 2.7 V to 5.5 V range. The
power supply is decoupled by 0.47
μ
F and 100 pF capacitors.
Table I. Evaluation Board Configuration Options
Component
Function
Default Value
C1, C2
C3
AC Coupling Capacitors.
High Frequency Bypass
Capacitor.
Low Frequency Bypass
Capacitor.
Optional RF Choke. Used
to increase current through
output stage when V
P
= 3 V.
Not recommended for use
when V
P
= 5 V.
1000 pF, 0603
100 pF, 0603
C4
0.47
μ
F, 0603
L1
100 nH, 0603
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相關代理商/技術參數 |
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| AD8354_05 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 MHz to 2.7 GHz RF Gain Block |
| AD8354ACP-R2 | 功能描述:IC RF GAIN BLOCK 8-LFCSP RoHS:否 類別:RF/IF 和 RFID >> RF 放大器 系列:- 標準包裝:3,000 系列:- 頻率:100MHz ~ 6GHz P1dB:9.14dBm（8.2mW） 增益:15.7dB 噪音數據:1.3dB RF 型:CDMA，TDMA，PCS 電源電壓:2.7 V ~ 5 V 電流 - 電源:60mA 測試頻率:2GHz 封裝/外殼:0505（1412 公制） 包裝:帶卷 (TR) |
| AD8354ACP-REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| AD8354ACP-REEL7 | 制造商:Analog Devices 功能描述:RF Amp Chip Single GP 2.7GHz 5.5V 8-Pin LFCSP EP T/R |
| AD8354ACPZ | 制造商:Analog Devices 功能描述:IC AMP RF/IF SMD LFCSP-8 8354 制造商:Analog Devices 功能描述:IC, AMP, RF/IF, SMD, LFCSP-8, 8354 制造商:Analog Devices 功能描述:AD8354ACPZ |
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