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參數資料
| 型號： | AD835 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 250 MHz, Voltage Output 4-Quadrant Multiplier |
| 中文描述： | 250，電壓輸出4兆赫的象限乘法器 |
| 文件頁數： | 8/8頁 |
| 文件大小： | 200K |
| 代理商： | AD835 |
AD835
REV. A
–8–
OUT LINE DIME NSIONS
Dimensions shown in inches and (mm).
8-Pin Plastic DIP
(N Package)
8-Pin Plastic SOIC
(R Package)
PIN 1
0.280 (7.11)
0.240 (6.10)
4
5
8
1
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.130
(3.30)
MIN
0.210
(5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.430 (10.92)
0.348 (8.84)
0.100
(2.54)
BSC
0.070 (1.77)
0.045 (1.15)
0.022 (0.558)
0.014 (0.356)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
4
5
1
8
8
°
0
°
0.0196 (0.50)
0.0099 (0.25)
x 45
°
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
0.0098 (0.25)
0.0040 (0.10)
0.1968 (5.00)
0.1890 (4.80)
0.102 (2.59)
0.094 (2.39)
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
Figure 22 shows a frequency doubler which overcomes this limi-
tation and provides a relatively constant output over a moder-
ately wide frequency range, determined by the time-constant C1
and R1. T he voltage applied to the X - and Y-inputs are exactly
in quadrature at a frequency f = 1/2
π
C1R1 and their ampli-
tudes are equal. At higher frequencies, the X -input becomes
smaller while the Y-input increases in amplitude; the opposite
happens at lower frequencies. T he result is a double frequency
output, centered on ground, whose amplitude of 1 V for a 1 V
input varies by only 0.5% over a frequency range of
±
10%. Be-
cause there is no “squared” dc component at the output, sud-
den changes in the input amplitude do not cause a “bounce” in
the dc level.
Figure 22. Broadband “ Zero-Bounce” Frequency Doubler
T his circuit is based on the identity
cos
θ
sin
θ =
1
θ
( 7)
At
ω
= 1/C1R1, the X input leads the input signal by 45
°
(and
is attenuated by
√
2
, while the Y input lags the input signal by
45
°
, and is also attenuated by
√
2.
Since the X and Y inputs are
90
°
out of phase, the response of the circuit will be
W
=
1
U
E
2
(sin
ω
t
±45
°
)
E
2
(sin
ω
t
+
45
°
)
=
E
2
2
U
(sin2
ω
t
)
(8)
which has no dc component, R2 and R3 are included to restore
the output to 1 V for an input amplitude of 1 V (the same gain
adjustment as mentioned earlier). Because the voltage across the
capacitor, C1, decreases with frequency, while that across the
resistor, R1, increases, the amplitude of the output varies only
slightly with frequency. In fact, it is only 0.5% below its full
value (at its center frequency
ω
Ο
= 1/C1R1) at 90% and 110%
of this frequency.
R1
R3
301
VOLTAGE
OUTPUT
X1
X2
AD835
VP
W
Z
4
VN
3
Y2
2
Y1
1
X1
+5V
–5V
R2
97.6
5
6
7
8
C1
V
G
P
C
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