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參數資料
| 型號： | AD8362ARU-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | 50 Hz to 2.7 GHz 60 dB TruPwr⑩ Detector |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | MO-153AB, TSSOP-16 |
| 文件頁數： | 25/36頁 |
| 文件大小： | 700K |
| 代理商： | AD8362ARU-REEL7 |
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AD8362
lowers the signal currents in the squaring cells by a factor of 25.
As well as making the system more sensitive to small static
errors (offsets) in the postdetection circuitry, such a reduction
also reduces the peak slew rate. A suitable adjustment to the
value of CLPF is needed to maintain a given AGC loop
bandwidth. On the other hand, increasing the target voltage can
improve the accuracy and stability of the intercept for low crest
factor signals. Thus, using VTGT = 2.5 V, the peak output
currents of the squaring cell are quadrupled and the peak slew
rate is increased by the same factor. CLPF should be increased
to maintain an adequate stability margin in the AGC loop.
Rev. B | Page 25 of 36
In many applications, it is useful to use a nonstandard value of
VTGT to shift the measurement range by a constant amount to
accommodate either a reduced or increased range of signal
inputs. The dynamic span remains >60 dB for such changes.
This technique is particularly useful when the sensitivity can be
lowered by raising VTGT, and there is little expectation of high
crest factor signals.
ADJUSTING THE INTERCEPT
Another way to take advantage of the effect of
VTGT
is to use it
to introduce an adjustment to the log intercept, represented by
the voltage
V
Z
in Equation 14. Formally, this can be expressed in
terms of a modified value of
V
Z
'
.
V
VTGT
V
V
Z
Z
'
25
.
=
(14)
A lower
VTGT
effectively increases the sensitivity of the
measurement system, which is just another way of stating that the
intercept moves to a lower value. This raises VOUT for all input
amplitudes, as demonstrated by the plots in Figure 45. This
control of the measurement system’s intercept could therefore be
brought about by applying the output of a DAC to the VTGT pin,
if that suits the overall objectives of an application.
For many purposes, a small manual adjustment range of ±3 dB
is sufficient. This can be implemented as shown in Figure 55.
Here, the largest fraction of VTGT is still provided by the built-
in reference to minimize the sensitivity to supply voltage
variations. Now a variable component is provided by the trim
network. For a 5 V supply, this added component of VTGT is 0
when VR1 is centered. With the slider closest to ground, VTGT
is lowered by 366 mV, which corresponds to a 3 dB decrease in
intercept; in the opposite condition, it is raised by 518 mV,
which increases the intercept by 3 dB. That is, VTGT ranges
from 1.25 V/√2 to √2 × 1.25 V.
Other adjustment ranges can be readily calculated from this
example. The resistance at the VTGT pin is nominally 52 k;
resistor values should be calculated with this in mind. In some
situations, this control interface might be driven from a
programmable source. In the simplest case, a logic level could
provide two intercept values, differing by say, 10 dB, thus
providing essentially two switched input ranges.
Also, it is worth remembering that these shifts in intercept are
equivalent, in most respects, to a dc offset applied to the
AD8362’s output, with the main differences being that:
Varying VTGT affects the crest factor capacity to some
extent
This technique makes better use of the available output
range than a post-VOUT adjustment would
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
COMM
CHPF
DECL
INHI
INLO
DECL
PWDN
COMM
ACOM
VREF
VTGT
VPOS
VOUT
VSET
ACOM
CLPF
AD8362
5V
4.02k
4.02k
5.75k
VR1
20k
0
Figure 55. Adjustments of the Intercept by ±3 dB
ALTERING THE SLOPE
None of the changes in operating conditions discussed so far
affect the logarithmic slope, V
SLP
, in Equation 9. However, this
can readily be altered by controlling the fraction of VOUT that
is fed back to the setpoint interface at the VSET pin. When the
full signal from VOUT is applied to VSET, the slope assumes its
nominal value of 50 mV/dB. It can be increased by including an
attenuator between these pins, as shown in Figure 56. Moder-
ately low resistance values should be used to minimize scaling
errors due to the 70 k input resistance at the VSET pin. Keep
in mind that this resistor string also loads the output, and it
eventually reduces the load-driving capabilities if very low
values are used. To calculate the resistor values, use
(
50
=
D
R2
R1
)
1
'
S
(15)
where
S
D
is the desired slope, expressed in mV/dB, and
R2'
is the value of R2 in parallel with 70 k. For example, using
R1 = 1.65 k and R2 = 1.69 k (R2' = 1.649 k), the nominal
slope is increased to 100 mV/dB. This choice of scaling is useful
when the output is applied to a digital voltmeter because the
displayed number reads as a decibel quantity directly, with only
a decimal point shift.
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
COMM
CHPF
DECL
INHI
INLO
DECL
PWDN
COMM
ACOM
VREF
VTGT
VPOS
VOUT
VSET
ACOM
CLPF
AD8362
V
OUT
R1
R2
0
Figure 56. External Network to Raise Slope
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD8362ARUZ | 功能描述:IC PWR DETECTOR 3.8GHZ 16-TSSOP RoHS:是 類別:RF/IF 和 RFID >> RF 檢測器 系列:- 產品變化通告:Product Discontinuation 15/May/2006 標準包裝:3,000 系列:- 頻率:100MHz ~ 2GHz RF 型:手機，GSM，DCS，PCS 輸入范圍:- 精確度:- 電源電壓:2.7 V ~ 5.5 V 電流 - 電源:300µA 包裝:帶卷 (TR) 封裝/外殼:SC-74，SOT-457 其它名稱:NCS5000SNT1GOS |
| AD8362ARUZ | 制造商:Analog Devices 功能描述:RMS Detector IC |
| AD8362ARUZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 Hz to 2.7 GHz 60 dB TruPwr⑩ Detector |
| AD8362ARUZ-REEL7 | 功能描述:IC PWR DETECTOR 3.8GHZ 16-TSSOP RoHS:是 類別:RF/IF 和 RFID >> RF 檢測器 系列:- 產品變化通告:Product Discontinuation 15/May/2006 標準包裝:3,000 系列:- 頻率:100MHz ~ 2GHz RF 型:手機，GSM，DCS，PCS 輸入范圍:- 精確度:- 電源電壓:2.7 V ~ 5.5 V 電流 - 電源:300µA 包裝:帶卷 (TR) 封裝/外殼:SC-74，SOT-457 其它名稱:NCS5000SNT1GOS |
| AD8362ARUZ-REEL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 Hz to 2.7 GHz 60 dB TruPwr⑩ Detector |
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