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參數資料
| 型號： | AD9215BCP-105 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 10-Bit, 65/80/105 MSPS, 3V A/D Converter |
| 中文描述： | 1-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, QCC32 |
| 封裝： | MO-220-VHHD-2, LFCSP-32 |
| 文件頁數： | 1/36頁 |
| 文件大小： | 1416K |
| 代理商： | AD9215BCP-105 |
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10-Bit, 65/80/105 MSPS,
3 V A/D Converter
AD9215
FEATURES
Rev.
A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
2004 Analog Devices, Inc. All rights reserved.
www.analog.com
Single 3 V supply operation (2.7 V to 3.3 V)
SNR = 58 dBc (to Nyquist)
SFDR = 77 dBc (to Nyquist)
Low power ADC core: 96 mW at 65 MSPS, 104 mW
@ 80 MSPS, 120 mW at 105 MSPS
Differential input with 300 MHz bandwidth
On-chip reference and sample-and-hold amplifier
DNL = ±0.25 LSB
Flexible analog input: 1 V p-p to 2 V p-p range
Offset binary or twos complement data format
Clock duty cycle stabilizer
APPLICATIONS
Ultrasound equipment
IF sampling in communications receivers
Battery-powered instruments
Hand-held scopemeters
Low cost digital oscilloscopes
PRODUCT DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
SHA
VIN+
VIN–
REFT
REFB
DRVDD
CLK
PDWN
MODE
CLOCK
DUTY CYCLE
STABLIZER
MODE
SELECT
DGND
OR
D9 (MSB)
0
D0
AVDD
CORRECTION LOGIC
OUTPUT BUFFERS
10
REF
SELECT
AGND
0.5V
VREF
SENSE
AD9215
PIPELINE
ADC CORE
Figure 1.
The AD9215 is a family of monolithic, single 3 V supply, 10-bit,
65/80/105 MSPS analog-to-digital converters (ADC). This family
features a high performance sample-and-hold amplifier (SHA)
and voltage reference. The AD9215 uses a multistage differential
pipelined architecture with output error correction logic to pro-
vide 10-bit accuracy at 105 MSPS data rates and to guarantee no
missing codes over the full operating temperature range.
The wide bandwidth, truly differential sample-and-hold ampli-
fier (SHA) allows for a variety of user-selectable input ranges
and offsets including single-ended applications. It is suitable for
multiplexed systems that switch full-scale voltage levels in
successive channels and for sampling single-channel inputs at
frequencies well beyond the Nyquist rate. Combined with
power and cost savings over previously available ADCs, the
AD9215 is suitable for applications in communications, imag-
ing, and medical ultrasound.
A single-ended clock input is used to control all internal conversion
cycles. A duty cycle stabilizer compensates for wide variations in the
clock duty cycle while maintaining excellent performance. The digital
output data is presented in straight binary or twos complement for-
mats. An out-of-range signal indicates an overflow condition, which
can be used with the MSB to determine low or high overflow.
Fabricated on an advanced CMOS process, the AD9215 is avail-
able in both a 28-lead surface-mount plastic package and a
32-lead chip scale package and is specified over the industrial
temperature range of 40°C to +85°C.
PRODUCT HIGHLIGHTS
1.
The AD9215 operates from a single 3 V power supply and
features a separate digital output driver supply to accom-
modate 2.5 V and 3.3 V logic families.
2.
Operating at 105 MSPS, the AD9215 core ADC consumes
a low 120 mW; at 80 MSPS, the power dissipation is 104
mW; and at 65 MSPS, the power dissipation is 96 mW.
3.
The patented SHA input maintains excellent performance
for input frequencies up to 200 MHz and can be config-
ured for single-ended or differential operation.
4.
The AD9215 is part of several pin compatible 10-, 12-, and
14-bit low power ADCs. This allows a simplified upgrade
from 10 bits to 12 bits for systems up to 80 MSPS.
5.
The clock duty cycle stabilizer maintains converter per-
formance over a wide range of clock pulse widths.
6.
The out of range (OR) output bit indicates when the signal
is beyond the selected input range.
相關PDF資料 |
PDF描述 |
|---|---|
| AD9215BCP-105EB | 10-Bit, 65/80/105 MSPS, 3V A/D Converter |
| AD9215BCP-65 | 10-Bit, 65/80/105 MSPS, 3V A/D Converter |
| AD9215BCP-65EB | 10-Bit, 65/80/105 MSPS, 3V A/D Converter |
| AD9215 | 10-Bit, 65/80/105 MSPS, 3V A/D Converter |
| AD9215BCP-80 | 10-Bit, 65/80/105 MSPS, 3V A/D Converter |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9215BCP-105EB | 制造商:Analog Devices 功能描述:Evaluation Board For AD9215 3 V A/D Converter ,10-Bit, 65/80/105 MSPS 制造商:Analog Devices 功能描述:EVAL BD FOR AD9215 3V A/D CNVRTR ,10-BIT, 65/80/105 MSPS - Bulk |
| AD9215BCP-105EBZ | 功能描述:BOARD EVAL FOR AD9215BCP-105 RoHS:是 類別:編程器，開發系統 >> 評估板 - 模數轉換器 (ADC) 系列:- 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數量:1 位數:12 采樣率（每秒）:94.4k 數據接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| AD9215BCP-65 | 制造商:Analog Devices 功能描述:ADC Single Pipelined 65Msps 10-bit Parallel 32-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:10 BIT LOW POWER 65/80/105 MSPS ADC - Bulk 制造商:Analog Devices 功能描述:10BIT ADC 65MSPS 9215 LFCSP-32 |
| AD9215BCP-65EB | 制造商:Analog Devices 功能描述:EVAL BD FOR AD9215 3V A/D CNVRTR ,10-BIT, 65/80/105 MSPS - Bulk |
| AD9215BCP-65EBZ | 功能描述:BOARD EVAL FOR AD9215BCP-65 RoHS:是 類別:編程器，開發系統 >> 評估板 - 模數轉換器 (ADC) 系列:- 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數量:1 位數:12 采樣率（每秒）:94.4k 數據接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
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