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參數(shù)資料
型號(hào): AD9224ARS
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: Complete 12-Bit 40 MSPS Monolithic A/D Converter
中文描述: 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: SSOP-28
文件頁(yè)數(shù): 11/24頁(yè)
文件大小: 309K
代理商: AD9224ARS
AD9224
–11–
REV. A
Table I. Analog Input Configuration Summary
Input
Connection
Input
Span (V)
Input Range (V)
VINA
1
Figure
#
Coupling
VINB
1
Comments
Single-Ended
DC
2
0 to 2
1
19, 20
Best for stepped input response applications, requires
±
5 V op amp.
2
×
VREF
0 to
2
×
VREF
VREF
19, 20
Same as above but with improved noise performance due to
increase in dynamic range. Headroom/settling time require-
ments of
±
5 op amp should be evaluated.
4
0 to 4
2.0
19, 20
Optimum noise performance, excellent SNR performance, often
requires low distortion op amp with VCC > +5 V due to its head-
room issues.
2
×
VREF
2.0 – VREF
to
2.0 + VREF
2.0
30
Optimum THD performance with VREF = 1. Single supply
operation (i.e., +5 V) for many op amps.
Single-Ended
AC
2 or
2
×
VREF
0 to 1 or
0 to 2
×
VREF
1 or VREF
21, 22
4
0.5 to 4.5
2.5
22
Optimum noise performance, excellent THD performance,
ability to use
±
5 V op amp.
2
×
VREF
2.0 – VREF
to
2.0 + VREF
2.0
21
Flexible input range, Optimum THD performance with
VREF = 1. Ability to use either +5 V or
±
5 V op amp.
Differential
(via Transformer)
or Amplifier
AC/DC
2
2 to 3
3 to 2
23, 24
Optimum full-scale THD and SFDR performance well beyond
the A/Ds Nyquist frequency. Preferred mode for undersampling
applications.
2
×
VREF
2.0 – VREF/2
to
2.0 + VREF/2
2.0 + VREF/2
to
2.0 – VREF/2
23, 24
Same as above with the exception that full-scale THD and SFDR
performance can be traded off for better noise performance.
4.0
1.5 to 3.5
3.5 to 1.5
23, 24
Optimum noise performance.
NOTE
1
VINA and VINB can be interchanged if signal inversion is required.
Table II. Reference Configuration Summary
Reference
Operating Mode
INTERNAL
INTERNAL
INTERNAL
Input Span (VINA–VINB)
(V p-p)
2
4
2
SPAN
4 AND
SPAN = 2
×
VREF
Required VREF (V)
1
2
1
VREF
2.0 AND
VREF = (1 + R1/R2)
Connect
SENSE
SENSE
R1
R2
To
VREF
REFCOM
VREF AND SENSE
SENSE AND REFCOM
EXTERNAL
(NONDYNAMIC)
2
SPAN
4
1
VREF
2.0
SENSE
VREF
AVDD
EXT. REF.
EXTERNAL
(DYNAMIC)
2
SPAN
4
CAPT and CAPB
Externally Driven
SENSE
VREF
EXT. REF.
EXT. REF.
AVDD
AVSS
CAPT
CAPB
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AD9224ARSZ 功能描述:IC ADC 12BIT 40MSPS 28-SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率(每秒):1M 數(shù)據(jù)接口:串行,SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散(最大):- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤(4x4) 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端,單極 產(chǎn)品目錄頁(yè)面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6
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