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參數資料
| 型號： | AD9225ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Complete 12-Bit, 25 MSPS Monolithic A/D Converter |
| 中文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | MO-150AH, SSOP-28 |
| 文件頁數： | 12/24頁 |
| 文件大小： | 321K |
| 代理商： | AD9225ARS |
AD9225
–12–
REV. A
Differential modes of operation (ac- or dc-coupled input) pro-
vide the best THD and SFDR performance over a wide fre-
quency range.
Differential operation should be considered for the
most demanding spectral-based applications
(e.g., direct IF-to-
digital conversion). See Figures 23, 24 and section on Differen-
tial Mode of Operation. Differential input characterization was
performed for this data sheet using the configuration shown in
Figure 24.
Single-ended operation requires that VINA be ac or dc coupled
to the input signal source while VINB of the AD9225 be biased
to the appropriate voltage corresponding to a midscale code
transition. Note that signal inversion may be easily accomplished
by transposing VINA and VINB. Most of the single-ended specifi-
cations for the AD9225 are characterized using Figure 21 cir-
cuitry with input spans of 4 V and 2 V as well as VINB = 2.5 V.
Differential operation requires that VINA and VINB be simulta-
neously driven with two equal signals that are in and out of
phase versions of the input signal. Differential operation of the
AD9225 offers the following benefits: (1) Signal swings are
smaller and therefore linearity requirements placed on the input
signal source may be easier to achieve, (2) Signal swings are
smaller and therefore may allow the use of op amps which may
otherwise have been constrained by headroom limitations, (3)
Differential operation minimizes even-order harmonic products,
and (4) Differential operation offers noise immunity based on
the device’s common-mode rejection.
As is typical of most IC devices, exceeding the supply limits will
turn on internal parasitic diodes resulting in transient currents
within the device. Figure 18 shows a simple means of clamping
an ac or dc coupled single ended input with the addition of two
series resistors and two diodes. An optional capacitor is shown
for ac coupled applications. Note that a larger series resistor
could be used to limit the fault current through D1 and D2 but
should be evaluated since it can cause a degradation in overall
performance. A similar clamping circuit could also be used for
each input if a differential input signal is being applied. The
diodes might cause nonlinearities in the signal. Careful evalua-
tion should be performed on the diodes used.
AVDD
AD9225
R
S1
30
V
V
CC
V
EE
OPTIONAL
AC COUPLING
CAPACITOR
D2
1N4148
D1
1N4148
R
S2
20
V
Figure 18. Simple Clamping Circuit
SINGLE-ENDED MODE OF OPERATION
The AD9225 can be configured for single ended operation using
dc or ac coupling. In either case, the input of the A/D must be
driven from an operational amplifier that will not degrade the
A/D’s performance. Because the A/D operates from a single
supply, it will be necessary to level shift ground-based bipolar
signals to comply with its input requirements. Both dc and ac
coupling provide this necessary function, but each method results
in different interface issues which may influence the system
design and performance.
Single-ended operation is often limited by the availability of
driving op amps. Very low distortion op amps that provide great
performance out to the Nyquist frequency of the converter are
hard to find. Compounding the problem, for dc-coupled, single-
ended applications, is the inability of many high performance
amplifiers to maintain low distortions as their outputs approach
their positive output voltage limit (i.e., 1 dB compression point).
For this reason, it is recommended that applications requiring high
performance dc coupling use the single-ended to differential
circuit shown in Figure 23.
DC COUPLING AND INTERFACE ISSUES
Many applications require the analog input signal to be dc coupled
to the AD9225. An operational amplifier can be configured to
rescale and level shift the input signal so that it is compatible
with the selected input range of the A/D. The input range to the
A/D should be selected on the basis of system performance
objectives as well as the analog power supply availability since
this will place certain constraints on the op amp selection.
Many of the new high performance op amps are specified for
only
±
5 V operation and have limited input/output swing capa-
bilities. The selected input range of the AD9225 should be
considered with the headroom requirements of the particular op
amp to prevent clipping of the signal. Also, since the output of a
dual supply amplifier can swing below –0.3 V, clamping its
output should be considered in some applications.
In some applications, it may be advantageous to use an op amp
specified for single supply +5 V operation since it will inherently
limit its output swing to within the power supply rails. Amplifiers
like the AD8041, AD8011 and are useful for this purpose but
their low bandwidths will limit the AD9225’s performance. High
performance amplifiers such as the AD9631, AD9632, AD8056
or AD8055 allow the AD9225 to be configured for larger
input spans which will improve the ADC’s noise performance.
Op amp circuits using a noninverting and inverting topology are
discussed in the next section. Although not shown, the nonin-
verting and inverting topologies can be easily configured as part
of an antialiasing filter by using a Sallen-Key or Multiple-Feed-
back topology. An additional R-C network can be inserted be-
tween the op amp’s output and the AD9225 input to provide a
filter pole.
Simple Op Amp Buffer
In the simplest case, the input signal to the AD9225 will already
be biased at levels in accordance with the selected input range.
It is simply necessary to provide an adequately low source im-
pedance for the VINA and VINB analog pins of the A/D. Figure
19 shows the recommended configuration a single-ended drive
using an op amp. In this case, the op amp is shown in a nonin-
verting unity gain configuration driving the VINA pin. The
internal reference drives the VINB pin. Note that the addi-
tion of a small series resistor of 30
to 50
connected to
VINA and VINB will be beneficial in nearly all cases. Refer to
section “Analog Input Operation” a discussion on resistor selec-
tion. Figure 19 shows the proper connection for a 0 V to 4 V
input range. Alternative single ended ranges of 0 V to 2
×
VREF
can also be realized with the proper configuration of VREF
(refer to the section “Using the Internal Reference”). Headroom
limitations of the op amp must always be considered.
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相關代理商/技術參數 |
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| AD9225ARSRL | 功能描述:IC ADC 12BIT 25MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD9225ARSZ | 功能描述:IC ADC 12BIT 25MSPS 28-SSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD9225ARSZ | 制造商:Analog Devices 功能描述:IC 制造商:Analog Devices 功能描述:IC, ADC, 12BIT, 25MSPS, SSOP-28 |
| AD9225ARSZRL | 功能描述:IC ADC 12BIT 25MSPS 28SSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD9225ARZ | 功能描述:IC ADC 12BIT 25MSPS 28-SOIC RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
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