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參數資料
| 型號： | AD9225ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Complete 12-Bit, 25 MSPS Monolithic A/D Converter |
| 中文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | MO-150AH, SSOP-28 |
| 文件頁數： | 14/24頁 |
| 文件大小： | 321K |
| 代理商： | AD9225ARS |
AD9225
–14–
REV. A
OP AMP SELECTION GUIDE
Op amp selection for the AD9225 is highly dependent on a
particular application. In general, the performance requirements
of any given application can be characterized by either time
domain or frequency domain parameters. In either case, one
should carefully select an op amp which preserves the perfor-
mance of the A/D. This task becomes challenging when one
considers the AD9225’s high performance capabilities coupled
with other extraneous system level requirements such as power
consumption and cost.
The ability to select the optimal op amp may be further compli-
cated by either limited power supply availability and/or limited
acceptable supplies for a desired op amp. Newer, high perfor-
mance op amps typically have input and output range limita-
tions in accordance with their lower supply voltages. As a result,
some op amps will be more appropriate in systems where ac-
coupling is allowable. When dc-coupling is required, op amps
without headroom constraints such as rail-to-rail op amps or
ones where larger supplies can be used should be considered.
The following section describes some op amps currently avail-
able from Analog Devices. The system designer is always
encouraged to contact the factory or local sales office to be
updated on Analog Devices latest amplifier product offerings.
Highlights of the areas where the op amps excel and where they
may limit the performance of the AD9225 is also included.
AD8055:
f
–3 dB
= 300 MHz.
Low cost. Best used for driving single-ended ac
coupled configuration.
Limit: THD is compromised when output is not
swinging about 0 V.
AD8056:
Dual Version of above amp.
Perfect for single-ended to differential configuration
(see Figure 23). Harmonics cancel each other in
differential drive, making this amplifier highly recom-
mended for a single-ended input signal source. Handles
input signals past the 20 MHz Nyquist frequency.
AD9631:
f
–3 dB
= 250 MHz.
Moderate cost.
Good for single-ended drive applications when signal
is anywhere between 0 V and 3 V.
Limits: THD is compromised above 8 MHz.
DIFFERENTIAL MODE OF OPERATION
Since not all applications have a signal preconditioned for differ-
ential operation, there is often a need to perform a single-ended-
to-differential conversion. In systems that do not need to be dc
coupled, an RF transformer with a center tap is the best method
to generate differential inputs for the AD9225. It provides all
the benefits of operating the A/D in the differential mode
without contributing additional noise or distortion. An RF
transformer also has the added benefit of providing electrical
isolation between the signal source and the A/D.
An improvement in THD and SFDR performance can be realized
by operating the AD9225 in the differential mode. The perfor-
mance enhancement between the differential and single-ended
mode is most noteworthy as the input frequency approaches
and goes beyond the Nyquist frequency (i.e., f
IN
> F
S
/2).
VINA
VINB
REF
+V
R*
0.1
m
F
500
V
VREF
0V
10
m
F
500
V
500
V
500
V
500
V
500
V
500
V
500
V
*OPTIONAL
50
V
50
V
AD9225
Figure 23. Direct Coupled Drive Circuit with AD8056
Dual Op Amp
The circuit shown in Figure 23 is an ideal method of applying a
differential dc drive to the AD9225. We have used this configu-
ration to drive the AD9225 from 2 V to 4 V spans at frequencies
approaching Nyquist with performance numbers matching those
shown on pages 2 and 3 of this data sheet (gathered through a
transformer). The dc input is shifted to a dc point swinging
symmetrically about the reference voltage. The optional resistor
will provide additional current if more reference drive is required.
The driver circuit shown in Figure 23 is optimized for dc cou-
pling applications requiring optimum distortion performance.
This differential op amp driver circuit is configured to convert
and level shift a 2 V p-p single-ended, ground referenced signal
to a 4 V p-p differential signal centered at the VREF level of the
ADC. The circuit is based on two op amps which are configured
as matched unity gain difference amplifiers. The single-ended
input signal is applied to opposing inputs of the difference am-
plifiers, thus providing differential drive. The common-mode
offset voltage is applied to the noninverting resistor leg of each
difference amplifier providing the required offset voltage. The
common-mode offset can be varied over a wide span without
any serious degradation in distortion performance as shown in
Figures 25a and 25b, thus providing some flexibility in improv-
ing output compression distortion from some
±
5 V op amps
with limited positive voltage swing.
To protect the AD9225 from an undervoltage fault condition
from op amps specified for
±
5 V operation, two diodes to AGND
can be inserted between each op amp output and the AD9225
inputs. The AD9225 will inherently be protected against any
overvoltage condition if the op amps share the same positive
power supply (i.e., AVDD) as the AD9225. Note, the gain
accuracy and common-mode rejection of each difference ampli-
fier in this driver circuit can be enhanced by using a matched
thin-film resistor network (i.e., Ohmtek ORNA5000F) for the
op amps. Recall, the AD9225’s small signal bandwidth is
105 MHz, hence any noise falling within the baseband band-
width of the AD9225 will degrade its overall noise performance.
The noise performance of each unity gain differential driver
circuit is limited by its inherent noise gain of two. For unity gain
op amps ONLY, the noise gain can be reduced from two to one
beyond the input signals passband by adding a shunt capacitor,
C
F
, across each op amp’s feedback resistor. This will essentially
establish a low-pass filter, which reduces the noise gain to one
beyond the filter’s f
–3 dB
while simultaneously bandlimiting the
input signal to f
–3 dB
. Note, the pole established by this filter can
also be used as the real pole of an antialiasing filter.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9225ARSRL | 功能描述:IC ADC 12BIT 25MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD9225ARSZ | 功能描述:IC ADC 12BIT 25MSPS 28-SSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD9225ARSZ | 制造商:Analog Devices 功能描述:IC 制造商:Analog Devices 功能描述:IC, ADC, 12BIT, 25MSPS, SSOP-28 |
| AD9225ARSZRL | 功能描述:IC ADC 12BIT 25MSPS 28SSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD9225ARZ | 功能描述:IC ADC 12BIT 25MSPS 28-SOIC RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
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