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參數資料
| 型號： | AD9289BBC-65EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Quad 8-Bit, 65 MSPS Serial LVDS 3V A/D Converter |
| 中文描述： | 四8位，65 MSPS的串行LVDS 3V的A / D轉換 |
| 文件頁數： | 2/16頁 |
| 文件大小： | 1376K |
| 代理商： | AD9289BBC-65EB |
AD9289 Prelimnary Technical Data
TABLE OF CONTENTS
AD9289—Specifications ............................................................ 3
Rev. PrJ | Page 2 of 16
6/25/2004
DIGITAL SPECIFICATIONS................................................. 4
AC SPECIFICATIONS........................................................... 4
SWITCHING SPECIFICATIONS........................................... 5
EXPLANATION OF TEST LEVELS...................................... 5
Absolute Maximum Ratings........................................................ 6
Definitions ................................................................................. 7
Theory of Operation ................................................................... 9
Clock Input............................................................................. 9
Analog Inputs......................................................................... 9
Voltage Reference....................................................................9
Internal Reference Connection...............................................10
External Reference Operation ................................................10
Digital Outputs......................................................................11
Timing..................................................................................11
PLL
LOCK
Output................................................................11
CML Pin...............................................................................11
Overange...............................................................................11
Pin Configurations ....................................................................13
Timing Diagram........................................................................14
Ordering Guide .....................................................................16
REVISION HISTORY
Revision PrA: Initial Version
Revision PrB: Updated specifications
Revision PrC: Added application section
Revision PrD: Revised block diagram, added LOCK/ output to timing diagram, added offset and gain matching definitions, updated Theory of
Operation
Revision PrE: Updated timing diagram and PLL description
Revision PrF: Updated Timing Specs, Pin Function Description (Added DNC pins), Added Pin Configuration Diagram and Package Outline
Revision PrG: Added DCR pin info, updated lvdsbias resistor value,
Revision H: Updated reference description, Removed S3, Added scope plot, Added FFT, Updated Tpd, Tcpd, Tmsb, Power, Updated
LVDSBIAS Resistor value, Min Encode
à
20MSPS
Revision I: Updated Power Supply Range, Added thermal impedance number,
Revision J: Added CML description, Modified Timing Diagram, Changed MSB naming to FCO,Removed S2, Modified Tpd,
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